modulator: modulator.c annotate

annotate modulator.c @ 27:e1d8fe3e418a

Run PIOs at 1x with delays and sync. Can now use a single trigger to set both DAC & ctrl. DAC [still] jitters against the ctrl though..

author	Daniel O'Connor <darius@dons.net.au>
date	Wed, 26 Feb 2025 11:03:59 +1030
parents	336f06fa6e47
children	600a394629e6

rev	line source
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 /******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	2 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	4 ** This is proprietary unpublished source code, property
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	5 ** of Genesis Software. Use or disclosure without prior
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 ** agreement is expressly prohibited.
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7 **
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	8 ** Copyright (c) 2025 Genesis Software, all rights reserved.
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11 ******************************************************************/
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	13 /*
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	14 ** MODULATOR.C
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	15 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	16 ** Create modulation shape
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	17 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	18 */
26 336f06fa6e47 Add comment Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	19
336f06fa6e47 Add comment Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	20 // Define this to use trigger.pio otherwise
336f06fa6e47 Add comment Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	21 // the code manually triggers from pwm_wrap
336f06fa6e47 Add comment Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	22 #define WITH_TRIGGER
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	23
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	24 #include <stdio.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	25 #include <string.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	26
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	27 #pragma GCC diagnostic push
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	28 #pragma GCC diagnostic ignored "-Wtype-limits"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	29 #pragma GCC diagnostic ignored "-Wsign-compare"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	30 #include "pico/stdlib.h"
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	31 #include "hardware/clocks.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	32 #include "hardware/dma.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	33 #include "hardware/interp.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	34 #include "hardware/irq.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	35 #include "hardware/pll.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	36 #include "hardware/pio.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	37 #include "hardware/pwm.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	38 #include "hardware/structs/pll.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	39 #include "hardware/structs/clocks.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	40 #pragma GCC diagnostic pop
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	41
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	42 #include "dac.pio.h"
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	43 #include "ctrl.pio.h"
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	44 #include "trigger.pio.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	45
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	46 // https://github.com/howerj/q
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	47 // Modified to be Q20.12 rather than Q16.16
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	48 #include "q/q.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	49
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	50 #include "shaped-trap.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	51
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	52 // Base of DAC pins
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	53 #define DACOUT_GPIO 7
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	54 // Base of ctrl pins
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	55 #define CTRLOUT_GPIO 16
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	56 // PWM output pin
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	57 #define TRIGOUT_GPIO 22
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	58 // PIO SM trigger input pin (connected to above for testing)
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	59 // Also outputs trigger on next pin
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	60 #define TRIGIN_GPIO 27
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	61
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	62 // Pulse control bits
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	63 #define PACTIVE 0x01
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	64 #define PHINV 0x02
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	65 #define SENSE1 0x04
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	66 #define SENSE2 0x08
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	67 #define GATE 0x10
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	68 #define TRSW 0x20
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	69
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	70 // Pulse shape data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	71 uint8_t pulse_data[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	72 // Pulse control data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	73 uint8_t pulse_ctrl[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	74 // PWM slice for PRF timer
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	75 unsigned slice_num = 0;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	76
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	77 // PIO for pulse generation
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	78 PIO pulse_pio = pio0;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	79
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	80 // DMA channel to feed DAC PIO
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	81 static int dac_dma_chan;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	82 // DAC SM
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	83 uint dac_sm;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	84 // Instruction offset for DAC PIO program
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	85 uint dac_pio_sm_offset;
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	86
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	87 // DMA channel to feed ctrl PIO
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	88 static int ctrl_dma_chan;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	89 // Ctrl SM
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	90 uint ctrl_sm;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	91 // Instruction offset for ctrl PIO program
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	92 uint ctrl_pio_sm_offset;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	93
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	94 /*
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	95 * Use a DMA channel to feed PIO0 SM0 with pulse data.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	96 * Each DMA transfer is a single pulse.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	97 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	98 * The PIO state machine waits to be triggered before starting
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	99 * so we can use another state machine to look for the trigger edge.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	100 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	101 * When the DMA is done the IRQ handler will configure it for the next
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	102 * pulse (or not if it should stop). ie reset the PIO state machine
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	103 * back to waiting for an edge and re-arm the DMA.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	104 */
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	105 void
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	106 dma_handler(void) {
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	107 // Clear the interrupt request.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	108 dma_hw->ints0 = 1u << dac_dma_chan;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	109
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	110 #if 0
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	111 printf("DAC transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	112 printf("Ctrl transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	113 #endif
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	114
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	115 // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	116 pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	117 pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset));
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	118
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	119 // Setup next pulse data & ctrl DMA addresses
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	120 dma_channel_wait_for_finish_blocking(dac_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	121 dma_channel_set_read_addr(dac_dma_chan, pulse_data, true);
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	122 dma_channel_wait_for_finish_blocking(ctrl_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	123 dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	124 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	125
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	126 void
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	127 pwm_wrap(void) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	128 pwm_clear_irq(slice_num);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	129
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	130 #ifndef WITH_TRIGGER
25 6070d2e66b4c Cascade IRQs from DAC to control so manual & external trigger are the same. Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	131 // Manually trigger DAC SM (cleared by SM)
6070d2e66b4c Cascade IRQs from DAC to control so manual & external trigger are the same. Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	132 pulse_pio->irq_force = 1;
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	133
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	134 // 'scope trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	135 gpio_put(2, 1);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	136 gpio_put(2, 0);
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	137 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	138 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	139
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	140 // Calculate pulse shape data
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	141 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	142 // Could encode them as bit stream like data but more compact would be
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	143 // (say) a list of counts to toggle pins at
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	144 // Need to add pre/postgate/sense/phase counters
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	145 unsigned
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	146 compute_pulse(uint8_t data, uint8_t ctrl, unsigned datalen, uint16_t plen, char code, uint8_t ncode, const uint8_t shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	147 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	148 q_t dcscale, stepsize;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	149 char tmps[20];
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	150 interp_config cfg;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	151
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	152 if (ncode == 1) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	153 // Number of samples for half of the pulse
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	154 // Do division first so we don't overflow Q16.16
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	155 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	156 // Number of samples for everything
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	157 // XXX: Need the +1 otherwise slew2 is truncated
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	158 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	159 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	160 shapesamples = plen / 2;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	161 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	162 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	163
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	164 // Number of steps per samples in the pulse shape
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	165 stepsize = qdiv(qint(shapelen), qint(shapesamples));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	166 qsprint(stepsize, tmps, sizeof(tmps));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	167 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	168
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	169 // Check the requested pulse will not overflow given data
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	170 if (nsamples > datalen) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	171 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	172 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	173 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	174 // Check it is not too short
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	175 if (shapesamples < 2) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	176 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	177 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	178 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	179 // Or too long (will overflow for loop variable)
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	180 if (qtoi(shapesamples) > 65535) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	181 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	182 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	183 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	184
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	185 // Setup interp 0 lane 0 to generate index into shape table
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	186 // Mask start is 0 because we use 8 bit samples
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	187 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	188 interp_config_set_shift(&cfg, QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	189 interp_config_set_mask(&cfg, 0, 32 - QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	190 interp_config_set_blend(&cfg, true);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	191 interp_set_config(interp0, 0, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	192
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	193 // Setup interp 0 lane 1 to LERP each sample pair
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	194 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	195 interp_config_set_shift(&cfg, QBITS - 8);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	196 interp_config_set_signed(&cfg, false);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	197 interp_config_set_cross_input(&cfg, true); // unsigned blending
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	198 interp_set_config(interp0, 1, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	199
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	200 // Setup interp 1 lane 0 to clamp 0-255
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	201 cfg = interp_default_config();
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	202 interp_config_set_clamp(&cfg, true);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	203 interp_config_set_shift(&cfg, 0);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	204 interp_config_set_mask(&cfg, 0, 8);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	205 interp_config_set_signed(&cfg, false);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	206 interp_set_config(interp1, 0, &cfg);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	207 interp1->base[0] = 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	208 interp1->base[1] = 255;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	209
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	210 interp0->accum[0] = 0; // Initial offset into shape table
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	211 interp0->base[2] = (uintptr_t)shape; // Start of shape table
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	212
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	213 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	214 qsprint(dcscale, tmps, sizeof(tmps));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	215 printf("dcscale = %s\n", tmps);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	216
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	217 memset(pulse_data, 0, datalen);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	218 memset(pulse_ctrl, 0, datalen);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	219 idx = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	220
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	221 // Up slew
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	222 for (uint16_t i = 0; i < slew1; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	223 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	224 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	225 for (uint16_t c = 0; c < ncode; c++) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	226 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	227 bit1startup = idx;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	228
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	229 uint ctrltmp = PACTIVE;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	230 if (code[c] == '0')
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	231 ctrltmp \|= PHINV;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	232
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	233 // Pulse up
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	234 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	235 interp0->accum[0] = 0; // Initial offset into shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	236 interp0->base[2] = (uintptr_t)shape; // Start of shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	237 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	238 for (uint16_t i = 0; i < shapesamples; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	239 ctrl[idx] = ctrltmp;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	240 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	241 // Get sample pair
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	242 uint8_t sample_pair = (uint8_t ) interp0->peek[2];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	243 // Ask lane 1 for a LERP, using the lane 0 accumulator
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	244 interp0->base[0] = sample_pair[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	245 interp0->base[1] = sample_pair[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	246 uint8_t peek = interp0->peek[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	247 // Apply DC offset scaling & clamp
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	248 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	249 data[idx++] = interp1->peek[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	250 // Update interpolator for next point
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	251 interp0->add_raw[0] = stepsize;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	252 } else
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	253 // Already done it before, just copy the previous instance
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	254 data[idx++] = data[bit1startup + i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	255 }
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	256 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	257 bit1stopup = idx - 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	258 // Pulse down
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	259 // Since the pulse is symmetrical just copy the up slope in reverse
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	260 // XXX: if we had asymmetrical predistortion this wouldn't be true
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	261 for (uint16_t i = 0; i < shapesamples; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	262 // Could replace this with a separate loop to poke it into place
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	263 // Similarly for TR switch when implemented
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	264 if (i == 0 && c == 0)
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	265 ctrl[idx] = ctrltmp \| SENSE1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	266 else
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	267 ctrl[idx] = ctrltmp;
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	268 data[idx++] = data[bit1stopup - i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	269 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	270
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	271 // Code gap
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	272 if (c < ncode - 1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	273 for (uint16_t i = 0; i < codegap; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	274 ctrl[idx] = ctrltmp;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	275 data[idx++] = dcofs;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	276 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	277 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	278
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	279 // Down slew
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	280 for (uint16_t i = 0; i < slew2 + 1; i++) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	281 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	282 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	283
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	284 data[idx++] = 0;
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	285 ctrl[idx] = 0;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	286
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	287 return idx + 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	288 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	289
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	290 int
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	291 main(void) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	292 absolute_time_t then, now;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	293
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	294 // Set sysclk to 120MHz
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	295 set_sys_clock_khz(120000, true);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	296
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	297 stdio_init_all();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	298 printf("\n\n\nIniting\n");
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	299
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	300 // Needed otherwise timer related functions hang under debugging
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	301 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	302 timer_hw->dbgpause = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	303
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	304 gpio_init(PICO_DEFAULT_LED_PIN);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	305 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	306 gpio_init(2);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	307 gpio_set_dir(2, GPIO_OUT);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	308
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	309 #if 0
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	310 // GPIO tester to check breadboard wiring
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	311 for (unsigned i = 7; i < 7 + 9; i++) {
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	312 printf("GPIO %d\n", i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	313 gpio_init(i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	314 gpio_set_dir(i, GPIO_OUT);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	315 printf("on\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	316 gpio_put(i, 1);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	317 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	318 printf("off\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	319 gpio_put(i, 0);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	320 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	321 }
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	322 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	323
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	324 uint32_t idx;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	325 uint16_t plen;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	326 char *code;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	327 if (1) {
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	328 plen = 8000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	329 code = "1110010";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	330 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	331 plen = 53000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	332 code = "1";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	333 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	334
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	335 uint8_t codegap = 4;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	336 uint8_t slew1 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	337 uint8_t slew2 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	338 uint8_t dcofs = 110;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	339 then = get_absolute_time();
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	340 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	341 plen, code, strlen(code),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	342 shaped_trap, sizeof(shaped_trap),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	343 codegap, slew1, slew2, dcofs)) == 0) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	344 printf("Failed to compute pulse\n");
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	345 while (1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	346 ;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	347 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	348 now = get_absolute_time();
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	349 unsigned long long diff = absolute_time_diff_us(then, now);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	350 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	351 diff, idx, (float)diff * 1000.0 / idx);
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	352 unsigned transfers = (idx + 3) >> 2;
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	353 printf("Using %u transfers\n", transfers);
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	354 //__breakpoint();
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	355
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	356 // Load the DAC program, and configure a free state machine
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	357 // to run the program.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	358 dac_pio_sm_offset = pio_add_program(pulse_pio, &dac_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	359 if (dac_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	360 printf("Unable to load DAC program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	361 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	362 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	363 dac_sm = pio_claim_unused_sm(pulse_pio, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	364 // Data is GPIO7 to GPIO14, clock is GPIO15
27 e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	365 // Clock divisor of 1 but the PIO has delays so it runs at 60MHz
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	366 // and generates a 30MHz clock
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	367 dac_program_init(pulse_pio, dac_sm, dac_pio_sm_offset, DACOUT_GPIO, 1);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	368
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	369 // Configure a channel to write 32 bits at a time to PIO0
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	370 // SM0's TX FIFO, paced by the data request signal from that peripheral.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	371 dac_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	372 dma_channel_config dac_dmac = dma_channel_get_default_config(dac_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	373 channel_config_set_transfer_data_size(&dac_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	374 channel_config_set_read_increment(&dac_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	375 channel_config_set_dreq(&dac_dmac, PIO_DREQ_NUM(pulse_pio, dac_sm, true));
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	376
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	377 dma_channel_configure(
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	378 dac_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	379 &dac_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	380 &pulse_pio->txf[dac_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	381 pulse_data, // Pulse data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	382 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	383 true // Start transfer
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	384 );
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	385
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	386 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	387 dma_channel_set_irq0_enabled(dac_dma_chan, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	388
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	389 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	390 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	391 irq_set_enabled(DMA_IRQ_0, true);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	392
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	393 // Load the ctrl program, and configure a free state machine
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	394 // to run the program.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	395 ctrl_pio_sm_offset = pio_add_program(pulse_pio, &ctrl_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	396 if (ctrl_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	397 printf("Unable to load ctrl program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	398 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	399 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	400 ctrl_sm = pio_claim_unused_sm(pulse_pio, true);
27 e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	401 ctrl_program_init(pulse_pio, ctrl_sm, ctrl_pio_sm_offset, CTRLOUT_GPIO, 1);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	402
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	403 // Configure a channel to write 32 bits at a time to PIO0
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	404 // SM0's TX FIFO, paced by the data request signal from that peripheral.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	405 ctrl_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	406 dma_channel_config ctrl_dmac = dma_channel_get_default_config(ctrl_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	407 channel_config_set_transfer_data_size(&ctrl_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	408 channel_config_set_read_increment(&ctrl_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	409 channel_config_set_dreq(&ctrl_dmac, PIO_DREQ_NUM(pulse_pio, ctrl_sm, true));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	410
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	411 dma_channel_configure(
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	412 ctrl_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	413 &ctrl_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	414 &pulse_pio->txf[ctrl_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	415 pulse_ctrl, // Ctrl data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	416 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	417 true // Start transfer
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	418 );
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	419 // No IRQ, piggyback on the data one
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	420
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	421 #ifdef WITH_TRIGGER
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	422 // Load the trigger program, and configure a free state machine
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	423 // to run the program.
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	424 uint trigger_pio_sm_offset = pio_add_program(pulse_pio, &trigger_program);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	425 if (trigger_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	426 printf("Unable to load trigger program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	427 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	428 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	429 uint trigger_sm = pio_claim_unused_sm(pulse_pio, true);
27 e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	430 trigger_program_init(pulse_pio, trigger_sm, trigger_pio_sm_offset, TRIGIN_GPIO, 1);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	431 #endif
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	432
27 e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	433 // Start & sync all state machines
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	434 // This is necessary to avoid any jitter and to make the
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	435 // trigger sync work correctly
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	436 pio_enable_sm_mask_in_sync(pulse_pio,
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	437 1u << dac_sm \|
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	438 1u << ctrl_sm \|
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	439 #ifdef WITH_TRIGGER
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	440 1u << trigger_sm
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	441 #endif
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	442 );
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	443 //
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	444 // Setup PWM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	445 // Used here to output a trigger which gets fed back into the trigger SM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	446 //
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	447 // 120MHz / 250 = 480kHz base
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	448 // Maximum divisor is only 256 which limits the low end,
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	449 // could further subdivide in the IRQ handler
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	450 pwm_config c = pwm_get_default_config();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	451 pwm_config_set_clkdiv_int(&c, 250);
27 e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	452 // 80Hz
e1d8fe3e418a Run PIOs at 1x with delays and sync. Daniel O'Connor <darius@dons.net.au> parents: 26 diff changeset	453 pwm_config_set_wrap(&c, 6000 - 1);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	454
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	455 gpio_set_function(TRIGOUT_GPIO, GPIO_FUNC_PWM);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	456
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	457 slice_num = pwm_gpio_to_slice_num(TRIGOUT_GPIO);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	458 pwm_init(slice_num, &c, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	459 pwm_clear_irq(slice_num);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	460 pwm_set_chan_level(slice_num, PWM_CHAN_A, 1);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	461 pwm_set_enabled(slice_num, 1);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	462 pwm_set_irq_enabled(slice_num, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	463 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	464 irq_set_enabled(PWM_IRQ_WRAP, true);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	465
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	466 // Everything else from this point is interrupt-driven. The processor has
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	467 // time to sit and think about its early retirement -- maybe open a bakery?
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	468 while (true) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	469 gpio_put(PICO_DEFAULT_LED_PIN, 1);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	470 sleep_ms(100);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	471 gpio_put(PICO_DEFAULT_LED_PIN, 0);
2 0d653f60dec8 Actually get data moving out. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	472 sleep_ms(100);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	473 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	474
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	475 __breakpoint();
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	476 }

Mercurial > ~darius > hgwebdir.cgi > modulator

annotate modulator.c @ 27:e1d8fe3e418a