Mercurial > ~darius > hgwebdir.cgi > modulator
changeset 17:a249e4727b01
Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler.
Otherwise we would collide with the setup in the main loop.
author | Daniel O'Connor <darius@dons.net.au> |
---|---|
date | Tue, 25 Feb 2025 13:40:57 +1030 |
parents | 56a79dce90e9 |
children | f1e44afb41a3 |
files | modulator.c |
diffstat | 1 files changed, 5 insertions(+), 16 deletions(-) [+] |
line wrap: on
line diff
--- a/modulator.c Tue Feb 25 13:31:27 2025 +1030 +++ b/modulator.c Tue Feb 25 13:40:57 2025 +1030 @@ -102,16 +102,18 @@ // Clear the interrupt request. dma_hw->ints0 = 1u << dac_dma_chan; - // Disabled for now, manual trigger only -#if 0 + printf("DAC: transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count); + printf("DAC: transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count); + // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset)); pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset)); // Setup next pulse data & ctrl DMA addresses + dma_channel_wait_for_finish_blocking(dac_dma_chan); dma_channel_set_read_addr(dac_dma_chan, pulse_data, true); + dma_channel_wait_for_finish_blocking(ctrl_dma_chan); dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true); -#endif } @@ -119,19 +121,6 @@ pwm_wrap(void) { pwm_clear_irq(slice_num); - // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger - pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset)); - pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset)); - - printf("DAC: transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count); - printf("DAC: transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count); - - // Setup next pulse data & ctrl DMA addresses - dma_channel_wait_for_finish_blocking(dac_dma_chan); - dma_channel_set_read_addr(dac_dma_chan, pulse_data, true); - dma_channel_wait_for_finish_blocking(ctrl_dma_chan); - dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true); - // Manually trigger DAQ SM (cleared by SM) pio0->irq_force = 1 << 0;