Mercurial > ~darius > hgwebdir.cgi > modulator
changeset 10:98880b18bcc1
Reset DAC PIO and use force trigger to do manual trigger.
author | Daniel O'Connor <darius@dons.net.au> |
---|---|
date | Mon, 24 Feb 2025 12:12:09 +1030 |
parents | 3acdebd7eec7 |
children | e9d12b36cfcc |
files | dac.pio modulator.c |
diffstat | 2 files changed, 24 insertions(+), 18 deletions(-) [+] |
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--- a/dac.pio Fri Feb 21 17:27:22 2025 +1030 +++ b/dac.pio Mon Feb 24 12:12:09 2025 +1030 @@ -6,15 +6,12 @@ .define TRIGGER_IRQ 0 ; Need 1 side set pin, the clock .side_set 1 -; Force load at address 0 so DMA handler can force a jump -; presumably we could calculate the address but this is easier. -.origin 0 ; Clock in a 0 byte -; mov pins, null side 0 -; nop side 1 -; Wait for start trigger -; wait 1 irq TRIGGER_IRQ side 0 + mov pins, null side 0 + nop side 1 +; Wait for start trigger and clear IRQ + wait 1 irq TRIGGER_IRQ side 0 ; Clock DAC and write data from the FIFO ; DAC clocks data in on the rising clock edge ; Autopull is enabled so no need to pull
--- a/modulator.c Fri Feb 21 17:27:22 2025 +1030 +++ b/modulator.c Mon Feb 24 12:12:09 2025 +1030 @@ -51,13 +51,20 @@ #define PHINV 0x04 #define PACTIVE 0x08 +// DMA channel to feed DAC PIO static int dma_chan; +// Pulse shape data uint8_t pulse_data[65536]; +// Pulse control data uint8_t pulse_ctrl[65536]; +// PWM slice for PRF timer unsigned slice_num = 0; -PIO pulse_pio; +// DAC PIO +PIO pulse_pio = pio0; +// DAC SM uint pulse_sm; - +// Instruction offset for DAC PIO program +uint pulse_pio_sm_offset; /* * Use a DMA channel to feed PIO0 SM0 with pulse data. * Each DMA transfer is a single pulse. @@ -73,10 +80,6 @@ dma_handler(void) { // Clear the interrupt request. dma_hw->ints0 = 1u << dma_chan; - // Give the channel a new wave table entry to read from, and re-trigger it - //dma_channel_set_read_addr(dma_chan, shaped_trap_dat_start, true); - // Reset pulse state machine back to waiting for trigger - //pio_sm_exec(pulse_pio, pulse_sm, pio_encode_jump(0); } @@ -90,8 +93,15 @@ state = !state; #endif - // Trigger another pulse read out + // Reset DAQ PIO SM so it is waiting for a trigger + pio_sm_exec(pulse_pio, pulse_sm, pio_encode_jmp(pulse_pio_sm_offset)); + + // Setup next pulse DMA address dma_channel_set_read_addr(dma_chan, pulse_data, true); + + // Manually trigger DAQ SM (cleared by SM) + pio0->irq_force = 1 << 0; + gpio_put(2, 1); gpio_put(2, 0); } @@ -304,17 +314,16 @@ unsigned long long diff = absolute_time_diff_us(then, now); printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n", diff, idx, (float)diff * 1000.0 / idx); - __breakpoint(); + //__breakpoint(); // Load the clocked_input program, and configure a free state machine // to run the program. - PIO pulse_pio = pio0; - uint offset = pio_add_program(pulse_pio, &dac_program); + pulse_pio_sm_offset = pio_add_program(pulse_pio, &dac_program); uint pulse_sm = pio_claim_unused_sm(pulse_pio, true); // Data is GPIO7 to GPIO14, clock is GPIO15 // Clock divisor of 2 so it runs at 60MHz and // generates a 30MHz clock - dac_program_init(pulse_pio, pulse_sm, offset, 7, 2); + dac_program_init(pulse_pio, pulse_sm, pulse_pio_sm_offset, 7, 2); // Configure a channel to write 32 bits at a time to PIO0 // SM0's TX FIFO, paced by the data request signal from that peripheral.