Mercurial > ~darius > hgwebdir.cgi > modulator
annotate ctrl.pio @ 27:e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Can now use a single trigger to set both DAC & ctrl.
DAC [still] jitters against the ctrl though..
| author | Daniel O'Connor <darius@dons.net.au> |
|---|---|
| date | Wed, 26 Feb 2025 11:03:59 +1030 |
| parents | 6070d2e66b4c |
| children | 600a394629e6 |
| rev | line source |
|---|---|
| 16 | 1 ; |
| 2 ; Copyright (c) 2025 Daniel O'Connor | |
| 3 ; | |
| 4 | |
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27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
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5 .define TRIGGER_IRQ 0 |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
6 |
| 16 | 7 .program ctrl |
| 8 ; Assert all 0s | |
| 9 mov pins, null | |
| 10 ; Wait for start trigger and clear IRQ | |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
11 wait 1 irq TRIGGER_IRQ |
| 16 | 12 .wrap_target |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
13 out pins 8 [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
14 nop [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
15 out pins 8 [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
16 nop [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
17 out pins 8 [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
18 nop [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
19 out pins 8 [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
20 nop [1] |
| 16 | 21 .wrap |
| 22 | |
| 23 % c-sdk { | |
| 24 static inline void ctrl_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) { | |
|
21
8d759cf5a9e7
Load correct program, use a separate IRQ
Daniel O'Connor <darius@dons.net.au>
parents:
18
diff
changeset
|
25 pio_sm_config c = ctrl_program_get_default_config(offset); |
| 16 | 26 |
| 27 // Set the OUT base pin to the provided `pin` parameter. | |
| 28 // Note: We only need 6 pins but pull a byte at a time to make | |
| 29 // generating the data simpler | |
| 30 sm_config_set_out_pins(&c, pin, 6); | |
| 31 // Set the pin directions to output at the PIO | |
| 32 pio_sm_set_consecutive_pindirs(pio, sm, pin, 6, true); | |
| 33 // Connect these GPIOs to this PIO block | |
| 34 for (int i = 0; i < 6; i++) | |
| 35 pio_gpio_init(pio, pin + i); | |
| 36 | |
| 37 sm_config_set_out_shift( | |
| 38 &c, | |
| 39 true, // Shift-to-right | |
| 40 true, // Autopull enabled | |
| 41 32 // Autopull threshold (bits!) | |
| 42 ); | |
| 43 | |
| 44 // We only send, so disable the RX FIFO to make the TX FIFO deeper. | |
| 45 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX); | |
| 46 | |
| 47 sm_config_set_clkdiv(&c, clkdiv); | |
| 48 | |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
49 // Load our configuration |
| 16 | 50 pio_sm_init(pio, sm, offset, &c); |
| 51 } | |
| 52 %} |