modulator: modulator.c annotate

annotate modulator.c @ 21:8d759cf5a9e7

Load correct program, use a separate IRQ

author	Daniel O'Connor <darius@dons.net.au>
date	Tue, 25 Feb 2025 15:46:32 +1030
parents	6aaa9658df1e
children	3c713073dd0c

rev	line source
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 /******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	2 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	4 ** This is proprietary unpublished source code, property
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	5 ** of Genesis Software. Use or disclosure without prior
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 ** agreement is expressly prohibited.
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7 **
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	8 ** Copyright (c) 2025 Genesis Software, all rights reserved.
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11 ******************************************************************/
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	13 /*
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	14 ** MODULATOR.C
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	15 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	16 ** Create modulation shape
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	17 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	18 */
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	19 #define WITH_CTRL
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	20 //#define WITH_TRIGGER
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	21
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	22 #include <stdio.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	23 #include <string.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	24
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	25 #pragma GCC diagnostic push
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	26 #pragma GCC diagnostic ignored "-Wtype-limits"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	27 #pragma GCC diagnostic ignored "-Wsign-compare"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	28 #include "pico/stdlib.h"
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	29 #include "hardware/clocks.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	30 #include "hardware/dma.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	31 #include "hardware/interp.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	32 #include "hardware/irq.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	33 #include "hardware/pll.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	34 #include "hardware/pio.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	35 #include "hardware/pwm.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	36 #include "hardware/structs/pll.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	37 #include "hardware/structs/clocks.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	38 #pragma GCC diagnostic pop
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	39
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	40 #include "dac.pio.h"
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	41 #include "ctrl.pio.h"
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	42 #include "trigger.pio.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	43
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	44 // https://github.com/howerj/q
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	45 // Modified to be Q20.12 rather than Q16.16
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	46 #include "q/q.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	47
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	48 #include "shaped-trap.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	49
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	50 // Base of DAC pins
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	51 #define DACOUT_GPIO 7
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	52 // Base of ctrl pins
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	53 #define CTRLOUT_GPIO 16
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	54 // PWM output pin
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	55 #define TRIGOUT_GPIO 23
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	56 // PIO SM trigger input pin (connected to above for testing)
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	57 #define TRIGIN_GPIO 27
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	58
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	59 // Pulse control bits
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	60 #define PACTIVE 0x01
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	61 #define PHINV 0x02
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	62 #define SENSE1 0x04
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	63 #define SENSE2 0x08
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	64 #define GATE 0x10
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	65 #define TRSW 0x20
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	66
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	67 // Pulse shape data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	68 uint8_t pulse_data[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	69 // Pulse control data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	70 uint8_t pulse_ctrl[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	71 // PWM slice for PRF timer
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	72 unsigned slice_num = 0;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	73
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	74 // PIO for pulse generation
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	75 PIO pulse_pio = pio0;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	76
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	77 // DMA channel to feed DAC PIO
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	78 static int dac_dma_chan;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	79 // DAC SM
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	80 uint dac_sm;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	81 // Instruction offset for DAC PIO program
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	82 uint dac_pio_sm_offset;
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	83 #ifdef WITH_CTRL
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	84 // DMA channel to feed ctrl PIO
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	85 static int ctrl_dma_chan;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	86 // Ctrl SM
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	87 uint ctrl_sm;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	88 // Instruction offset for ctrl PIO program
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	89 uint ctrl_pio_sm_offset;
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	90 #endif
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	91
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	92 /*
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	93 * Use a DMA channel to feed PIO0 SM0 with pulse data.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	94 * Each DMA transfer is a single pulse.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	95 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	96 * The PIO state machine waits to be triggered before starting
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	97 * so we can use another state machine to look for the trigger edge.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	98 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	99 * When the DMA is done the IRQ handler will configure it for the next
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	100 * pulse (or not if it should stop). ie reset the PIO state machine
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	101 * back to waiting for an edge and re-arm the DMA.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	102 */
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	103 void
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	104 dma_handler(void) {
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	105 printf("dma_handler %d\n", get_core_num());
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	106 // Clear the interrupt request.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	107 dma_hw->ints0 = 1u << dac_dma_chan;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	108
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	109 printf("DAC transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	110 #ifdef WITH_CTRL
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	111 printf("Ctrl transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	112 #endif
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	113
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	114 // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	115 pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset));
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	116 #ifdef WITH_CTRL
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	117 pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset));
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	118 #endif
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	119
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	120 // Setup next pulse data & ctrl DMA addresses
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	121 dma_channel_wait_for_finish_blocking(dac_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	122 dma_channel_set_read_addr(dac_dma_chan, pulse_data, true);
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	123 #ifdef WITH_CTRL
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	124 dma_channel_wait_for_finish_blocking(ctrl_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	125 dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true);
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	126 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	127 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	128
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	129
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	130 void
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	131 pwm_wrap(void) {
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	132 printf("pwm_wrap %d\n", get_core_num());
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	133 pwm_clear_irq(slice_num);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	134
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	135 #ifndef WITH_TRIGGER
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	136 // Manually trigger DAQ SM (cleared by SM)
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	137 pulse_pio->irq_force = 3;
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	138 #endif
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	139
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	140 // 'scope trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	141 gpio_put(2, 1);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	142 gpio_put(2, 0);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	143 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	144
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	145 // Calculate pulse shape data
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	146 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	147 // Could encode them as bit stream like data but more compact would be
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	148 // (say) a list of counts to toggle pins at
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	149 // Need to add pre/postgate/sense/phase counters
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	150 unsigned
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	151 compute_pulse(uint8_t data, uint8_t ctrl, unsigned datalen, uint16_t plen, char code, uint8_t ncode, const uint8_t shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	152 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	153 q_t dcscale, stepsize;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	154 char tmps[20];
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	155 interp_config cfg;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	156
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	157 if (ncode == 1) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	158 // Number of samples for half of the pulse
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	159 // Do division first so we don't overflow Q16.16
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	160 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	161 // Number of samples for everything
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	162 // XXX: Need the +1 otherwise slew2 is truncated
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	163 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	164 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	165 shapesamples = plen / 2;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	166 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	167 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	168
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	169 // Number of steps per samples in the pulse shape
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	170 stepsize = qdiv(qint(shapelen), qint(shapesamples));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	171 qsprint(stepsize, tmps, sizeof(tmps));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	172 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	173
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	174 // Check the requested pulse will not overflow given data
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	175 if (nsamples > datalen) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	176 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	177 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	178 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	179 // Check it is not too short
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	180 if (shapesamples < 2) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	181 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	182 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	183 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	184 // Or too long (will overflow for loop variable)
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	185 if (qtoi(shapesamples) > 65535) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	186 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	187 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	188 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	189
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	190 // Setup interp 0 lane 0 to generate index into shape table
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	191 // Mask start is 0 because we use 8 bit samples
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	192 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	193 interp_config_set_shift(&cfg, QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	194 interp_config_set_mask(&cfg, 0, 32 - QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	195 interp_config_set_blend(&cfg, true);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	196 interp_set_config(interp0, 0, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	197
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	198 // Setup interp 0 lane 1 to LERP each sample pair
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	199 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	200 interp_config_set_shift(&cfg, QBITS - 8);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	201 interp_config_set_signed(&cfg, false);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	202 interp_config_set_cross_input(&cfg, true); // unsigned blending
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	203 interp_set_config(interp0, 1, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	204
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	205 // Setup interp 1 lane 0 to clamp 0-255
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	206 cfg = interp_default_config();
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	207 interp_config_set_clamp(&cfg, true);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	208 interp_config_set_shift(&cfg, 0);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	209 interp_config_set_mask(&cfg, 0, 8);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	210 interp_config_set_signed(&cfg, false);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	211 interp_set_config(interp1, 0, &cfg);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	212 interp1->base[0] = 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	213 interp1->base[1] = 255;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	214
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	215 interp0->accum[0] = 0; // Initial offset into shape table
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	216 interp0->base[2] = (uintptr_t)shape; // Start of shape table
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	217
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	218 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	219 qsprint(dcscale, tmps, sizeof(tmps));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	220 printf("dcscale = %s\n", tmps);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	221
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	222 memset(pulse_data, 0, datalen);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	223 memset(pulse_ctrl, 0, datalen);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	224 idx = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	225
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	226 // Up slew
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	227 for (uint16_t i = 0; i < slew1; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	228 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	229 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	230 for (uint16_t c = 0; c < ncode; c++) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	231 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	232 bit1startup = idx;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	233
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	234 uint ctrltmp = PACTIVE;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	235 if (code[c] == '0')
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	236 ctrltmp \|= PHINV;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	237
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	238 // Pulse up
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	239 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	240 interp0->accum[0] = 0; // Initial offset into shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	241 interp0->base[2] = (uintptr_t)shape; // Start of shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	242 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	243 for (uint16_t i = 0; i < shapesamples; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	244 ctrl[idx] = ctrltmp;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	245 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	246 // Get sample pair
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	247 uint8_t sample_pair = (uint8_t ) interp0->peek[2];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	248 // Ask lane 1 for a LERP, using the lane 0 accumulator
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	249 interp0->base[0] = sample_pair[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	250 interp0->base[1] = sample_pair[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	251 uint8_t peek = interp0->peek[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	252 // Apply DC offset scaling & clamp
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	253 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	254 data[idx++] = interp1->peek[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	255 // Update interpolator for next point
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	256 interp0->add_raw[0] = stepsize;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	257 } else
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	258 // Already done it before, just copy the previous instance
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	259 data[idx++] = data[bit1startup + i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	260 }
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	261 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	262 bit1stopup = idx - 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	263 // Pulse down
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	264 // Since the pulse is symmetrical just copy the up slope in reverse
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	265 // XXX: if we had asymmetrical predistortion this wouldn't be true
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	266 for (uint16_t i = 0; i < shapesamples; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	267 // Could replace this with a separate loop to poke it into place
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	268 // Similarly for TR switch when implemented
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	269 if (i == 0 && c == 0)
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	270 ctrl[idx] = ctrltmp \| SENSE1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	271 else
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	272 ctrl[idx] = ctrltmp;
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	273 data[idx++] = data[bit1stopup - i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	274 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	275
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	276 // Code gap
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	277 if (c < ncode - 1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	278 for (uint16_t i = 0; i < codegap; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	279 ctrl[idx] = ctrltmp;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	280 data[idx++] = dcofs;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	281 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	282 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	283
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	284 // Down slew
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	285 for (uint16_t i = 0; i < slew2 + 1; i++) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	286 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	287 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	288
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	289 data[idx++] = 0;
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	290 ctrl[idx] = 0;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	291
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	292 return idx + 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	293 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	294
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	295 int
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	296 main(void) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	297 absolute_time_t then, now;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	298
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	299 // Set sysclk to 120MHz
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	300 set_sys_clock_khz(120000, true);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	301
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	302 stdio_init_all();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	303 printf("\n\n\nIniting\n");
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	304
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	305 // Needed otherwise timer related functions hang under debugging
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	306 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	307 timer_hw->dbgpause = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	308
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	309 gpio_init(PICO_DEFAULT_LED_PIN);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	310 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	311 gpio_init(2);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	312 gpio_set_dir(2, GPIO_OUT);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	313
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	314 #if 0
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	315 // GPIO tester to check breadboard wiring
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	316 for (unsigned i = 7; i < 7 + 9; i++) {
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	317 printf("GPIO %d\n", i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	318 gpio_init(i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	319 gpio_set_dir(i, GPIO_OUT);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	320 printf("on\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	321 gpio_put(i, 1);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	322 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	323 printf("off\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	324 gpio_put(i, 0);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	325 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	326 }
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	327 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	328
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	329 uint32_t idx;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	330 uint16_t plen;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	331 char *code;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	332 if (1) {
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	333 plen = 8000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	334 code = "1110010";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	335 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	336 plen = 53000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	337 code = "1";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	338 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	339
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	340 uint8_t codegap = 4;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	341 uint8_t slew1 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	342 uint8_t slew2 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	343 uint8_t dcofs = 110;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	344 then = get_absolute_time();
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	345 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	346 plen, code, strlen(code),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	347 shaped_trap, sizeof(shaped_trap),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	348 codegap, slew1, slew2, dcofs)) == 0) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	349 printf("Failed to compute pulse\n");
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	350 while (1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	351 ;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	352 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	353 now = get_absolute_time();
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	354 unsigned long long diff = absolute_time_diff_us(then, now);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	355 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	356 diff, idx, (float)diff * 1000.0 / idx);
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	357 unsigned transfers = (idx + 3) >> 2;
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	358 printf("Using %u transfers\n", transfers);
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	359 //__breakpoint();
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	360
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	361 // Load the DAC program, and configure a free state machine
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	362 // to run the program.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	363 dac_pio_sm_offset = pio_add_program(pulse_pio, &dac_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	364 if (dac_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	365 printf("Unable to load DAC program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	366 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	367 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	368 dac_sm = pio_claim_unused_sm(pulse_pio, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	369 // Data is GPIO7 to GPIO14, clock is GPIO15
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	370 // Clock divisor of 2 so it runs at 60MHz and
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	371 // generates a 30MHz clock
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	372 dac_program_init(pulse_pio, dac_sm, dac_pio_sm_offset, DACOUT_GPIO, 2);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	373
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	374 // Configure a channel to write 32 bits at a time to PIO0
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	375 // SM0's TX FIFO, paced by the data request signal from that peripheral.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	376 dac_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	377 dma_channel_config dac_dmac = dma_channel_get_default_config(dac_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	378 channel_config_set_transfer_data_size(&dac_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	379 channel_config_set_read_increment(&dac_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	380 channel_config_set_dreq(&dac_dmac, PIO_DREQ_NUM(pulse_pio, dac_sm, true));
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	381
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	382 dma_channel_configure(
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	383 dac_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	384 &dac_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	385 &pulse_pio->txf[dac_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	386 pulse_data, // Pulse data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	387 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	388 true // Start transfer
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	389 );
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	390
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	391 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	392 dma_channel_set_irq0_enabled(dac_dma_chan, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	393
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	394 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	395 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	396 irq_set_enabled(DMA_IRQ_0, true);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	397
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	398 #ifdef WITH_CTRL
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	399 // Load the ctrl program, and configure a free state machine
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	400 // to run the program.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	401 ctrl_pio_sm_offset = pio_add_program(pulse_pio, &ctrl_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	402 if (ctrl_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	403 printf("Unable to load ctrl program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	404 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	405 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	406 ctrl_sm = pio_claim_unused_sm(pulse_pio, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	407 ctrl_program_init(pulse_pio, ctrl_sm, ctrl_pio_sm_offset, CTRLOUT_GPIO, 2);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	408
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	409 // Configure a channel to write 32 bits at a time to PIO0
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	410 // SM0's TX FIFO, paced by the data request signal from that peripheral.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	411 ctrl_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	412 dma_channel_config ctrl_dmac = dma_channel_get_default_config(ctrl_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	413 channel_config_set_transfer_data_size(&ctrl_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	414 channel_config_set_read_increment(&ctrl_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	415 channel_config_set_dreq(&ctrl_dmac, PIO_DREQ_NUM(pulse_pio, ctrl_sm, true));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	416
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	417 dma_channel_configure(
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	418 ctrl_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	419 &ctrl_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	420 &pulse_pio->txf[ctrl_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	421 pulse_ctrl, // Ctrl data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	422 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	423 true // Start transfer
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	424 );
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	425 // No IRQ, piggyback on the data one
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	426 #endif
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	427
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	428 #ifdef WITH_TRIGGER
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	429 // Load the trigger program, and configure a free state machine
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	430 // to run the program.
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	431 uint trigger_pio_sm_offset = pio_add_program(pulse_pio, &trigger_program);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	432 if (trigger_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	433 printf("Unable to load trigger program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	434 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	435 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	436 uint trigger_sm = pio_claim_unused_sm(pulse_pio, true);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	437 trigger_program_init(pulse_pio, trigger_sm, trigger_pio_sm_offset, TRIGIN_GPIO, 2);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	438 #endif
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	439 //
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	440 // Setup PWM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	441 // Used here to output a trigger which gets fed back into the trigger SM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	442 //
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	443 // 120MHz / 250 = 480kHz base
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	444 // Maximum divisor is only 256 which limits the low end,
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	445 // could further subdivide in the IRQ handler
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	446 pwm_config c = pwm_get_default_config();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	447 pwm_config_set_clkdiv_int(&c, 250);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	448 // 8Hz
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	449 pwm_config_set_wrap(&c, 60000 - 1);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	450
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	451 gpio_set_function(TRIGOUT_GPIO, GPIO_FUNC_PWM);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	452
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	453 slice_num = pwm_gpio_to_slice_num(TRIGOUT_GPIO);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	454 pwm_init(slice_num, &c, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	455 pwm_clear_irq(slice_num);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	456 pwm_set_chan_level(slice_num, PWM_CHAN_A, 1);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	457 pwm_set_enabled(slice_num, 1);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	458 pwm_set_irq_enabled(slice_num, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	459 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	460 irq_set_enabled(PWM_IRQ_WRAP, true);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	461
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	462 // Everything else from this point is interrupt-driven. The processor has
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	463 // time to sit and think about its early retirement -- maybe open a bakery?
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	464 while (true) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	465 gpio_put(PICO_DEFAULT_LED_PIN, 1);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	466 sleep_ms(100);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	467 gpio_put(PICO_DEFAULT_LED_PIN, 0);
2 0d653f60dec8 Actually get data moving out. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	468 sleep_ms(100);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	469 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	470
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	471 __breakpoint();
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	472 }

Mercurial > ~darius > hgwebdir.cgi > modulator

annotate modulator.c @ 21:8d759cf5a9e7