modulator: modulator.c annotate

annotate modulator.c @ 25:6070d2e66b4c

Cascade IRQs from DAC to control so manual & external trigger are the same.

author	Daniel O'Connor <darius@dons.net.au>
date	Tue, 25 Feb 2025 16:53:32 +1030
parents	c7845db23ab2
children	336f06fa6e47

rev	line source
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 /******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	2 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	4 ** This is proprietary unpublished source code, property
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	5 ** of Genesis Software. Use or disclosure without prior
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 ** agreement is expressly prohibited.
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7 **
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	8 ** Copyright (c) 2025 Genesis Software, all rights reserved.
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 *******************************************************************
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11 ******************************************************************/
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	13 /*
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	14 ** MODULATOR.C
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	15 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	16 ** Create modulation shape
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	17 **
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	18 */
25 6070d2e66b4c Cascade IRQs from DAC to control so manual & external trigger are the same. Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	19 //#define WITH_TRIGGER
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	20
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	21 #include <stdio.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	22 #include <string.h>
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	23
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	24 #pragma GCC diagnostic push
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	25 #pragma GCC diagnostic ignored "-Wtype-limits"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	26 #pragma GCC diagnostic ignored "-Wsign-compare"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	27 #include "pico/stdlib.h"
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	28 #include "hardware/clocks.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	29 #include "hardware/dma.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	30 #include "hardware/interp.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	31 #include "hardware/irq.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	32 #include "hardware/pll.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	33 #include "hardware/pio.h"
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	34 #include "hardware/pwm.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	35 #include "hardware/structs/pll.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	36 #include "hardware/structs/clocks.h"
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	37 #pragma GCC diagnostic pop
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	38
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	39 #include "dac.pio.h"
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	40 #include "ctrl.pio.h"
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	41 #include "trigger.pio.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	42
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	43 // https://github.com/howerj/q
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	44 // Modified to be Q20.12 rather than Q16.16
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	45 #include "q/q.h"
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	46
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	47 #include "shaped-trap.h"
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	48
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	49 // Base of DAC pins
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	50 #define DACOUT_GPIO 7
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	51 // Base of ctrl pins
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	52 #define CTRLOUT_GPIO 16
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	53 // PWM output pin
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	54 #define TRIGOUT_GPIO 22
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	55 // PIO SM trigger input pin (connected to above for testing)
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	56 // Also outputs trigger on next pin
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	57 #define TRIGIN_GPIO 27
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	58
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	59 // Pulse control bits
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	60 #define PACTIVE 0x01
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	61 #define PHINV 0x02
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	62 #define SENSE1 0x04
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	63 #define SENSE2 0x08
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	64 #define GATE 0x10
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	65 #define TRSW 0x20
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	66
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	67 // Pulse shape data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	68 uint8_t pulse_data[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	69 // Pulse control data
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	70 uint8_t pulse_ctrl[65536] __attribute__((aligned(4)));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	71 // PWM slice for PRF timer
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	72 unsigned slice_num = 0;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	73
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	74 // PIO for pulse generation
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	75 PIO pulse_pio = pio0;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	76
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	77 // DMA channel to feed DAC PIO
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	78 static int dac_dma_chan;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	79 // DAC SM
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	80 uint dac_sm;
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	81 // Instruction offset for DAC PIO program
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	82 uint dac_pio_sm_offset;
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	83
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	84 // DMA channel to feed ctrl PIO
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	85 static int ctrl_dma_chan;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	86 // Ctrl SM
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	87 uint ctrl_sm;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	88 // Instruction offset for ctrl PIO program
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	89 uint ctrl_pio_sm_offset;
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	90
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	91 /*
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	92 * Use a DMA channel to feed PIO0 SM0 with pulse data.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	93 * Each DMA transfer is a single pulse.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	94 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	95 * The PIO state machine waits to be triggered before starting
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	96 * so we can use another state machine to look for the trigger edge.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	97 *
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	98 * When the DMA is done the IRQ handler will configure it for the next
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	99 * pulse (or not if it should stop). ie reset the PIO state machine
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	100 * back to waiting for an edge and re-arm the DMA.
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	101 */
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	102 void
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	103 dma_handler(void) {
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	104 // Clear the interrupt request.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	105 dma_hw->ints0 = 1u << dac_dma_chan;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	106
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	107 #if 0
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	108 printf("DAC transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	109 printf("Ctrl transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	110 #endif
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	111
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	112 // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	113 pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	114 pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset));
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	115
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	116 // Setup next pulse data & ctrl DMA addresses
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	117 dma_channel_wait_for_finish_blocking(dac_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	118 dma_channel_set_read_addr(dac_dma_chan, pulse_data, true);
17 a249e4727b01 Move SM reset & DMA reprogramming to DMA IRQ handler, only trigger in PWM IRQ handler. Daniel O'Connor <darius@dons.net.au> parents: 16 diff changeset	119 dma_channel_wait_for_finish_blocking(ctrl_dma_chan);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	120 dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	121 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	122
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	123 void
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	124 pwm_wrap(void) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	125 pwm_clear_irq(slice_num);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	126
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	127 #ifndef WITH_TRIGGER
25 6070d2e66b4c Cascade IRQs from DAC to control so manual & external trigger are the same. Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	128 // Manually trigger DAC SM (cleared by SM)
6070d2e66b4c Cascade IRQs from DAC to control so manual & external trigger are the same. Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	129 pulse_pio->irq_force = 1;
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	130
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	131 // 'scope trigger
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	132 gpio_put(2, 1);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	133 gpio_put(2, 0);
23 3c713073dd0c Remove debug prints and #ifdef now the control code works. Daniel O'Connor <darius@dons.net.au> parents: 20 diff changeset	134 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	135 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	136
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	137 // Calculate pulse shape data
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	138 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	139 // Could encode them as bit stream like data but more compact would be
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	140 // (say) a list of counts to toggle pins at
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	141 // Need to add pre/postgate/sense/phase counters
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	142 unsigned
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	143 compute_pulse(uint8_t data, uint8_t ctrl, unsigned datalen, uint16_t plen, char code, uint8_t ncode, const uint8_t shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	144 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	145 q_t dcscale, stepsize;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	146 char tmps[20];
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	147 interp_config cfg;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	148
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	149 if (ncode == 1) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	150 // Number of samples for half of the pulse
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	151 // Do division first so we don't overflow Q16.16
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	152 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	153 // Number of samples for everything
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	154 // XXX: Need the +1 otherwise slew2 is truncated
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	155 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	156 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	157 shapesamples = plen / 2;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	158 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	159 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	160
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	161 // Number of steps per samples in the pulse shape
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	162 stepsize = qdiv(qint(shapelen), qint(shapesamples));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	163 qsprint(stepsize, tmps, sizeof(tmps));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	164 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	165
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	166 // Check the requested pulse will not overflow given data
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	167 if (nsamples > datalen) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	168 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	169 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	170 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	171 // Check it is not too short
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	172 if (shapesamples < 2) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	173 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	174 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	175 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	176 // Or too long (will overflow for loop variable)
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	177 if (qtoi(shapesamples) > 65535) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	178 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	179 return 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	180 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	181
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	182 // Setup interp 0 lane 0 to generate index into shape table
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	183 // Mask start is 0 because we use 8 bit samples
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	184 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	185 interp_config_set_shift(&cfg, QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	186 interp_config_set_mask(&cfg, 0, 32 - QBITS);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	187 interp_config_set_blend(&cfg, true);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	188 interp_set_config(interp0, 0, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	189
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	190 // Setup interp 0 lane 1 to LERP each sample pair
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	191 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	192 interp_config_set_shift(&cfg, QBITS - 8);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	193 interp_config_set_signed(&cfg, false);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	194 interp_config_set_cross_input(&cfg, true); // unsigned blending
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	195 interp_set_config(interp0, 1, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	196
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	197 // Setup interp 1 lane 0 to clamp 0-255
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	198 cfg = interp_default_config();
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	199 interp_config_set_clamp(&cfg, true);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	200 interp_config_set_shift(&cfg, 0);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	201 interp_config_set_mask(&cfg, 0, 8);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	202 interp_config_set_signed(&cfg, false);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	203 interp_set_config(interp1, 0, &cfg);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	204 interp1->base[0] = 0;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	205 interp1->base[1] = 255;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	206
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	207 interp0->accum[0] = 0; // Initial offset into shape table
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	208 interp0->base[2] = (uintptr_t)shape; // Start of shape table
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	209
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	210 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	211 qsprint(dcscale, tmps, sizeof(tmps));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	212 printf("dcscale = %s\n", tmps);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	213
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	214 memset(pulse_data, 0, datalen);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	215 memset(pulse_ctrl, 0, datalen);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	216 idx = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	217
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	218 // Up slew
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	219 for (uint16_t i = 0; i < slew1; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	220 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	221 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	222 for (uint16_t c = 0; c < ncode; c++) {
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	223 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	224 bit1startup = idx;
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	225
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	226 uint ctrltmp = PACTIVE;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	227 if (code[c] == '0')
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	228 ctrltmp \|= PHINV;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	229
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	230 // Pulse up
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	231 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	232 interp0->accum[0] = 0; // Initial offset into shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	233 interp0->base[2] = (uintptr_t)shape; // Start of shape table
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	234 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	235 for (uint16_t i = 0; i < shapesamples; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	236 ctrl[idx] = ctrltmp;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	237 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	238 // Get sample pair
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	239 uint8_t sample_pair = (uint8_t ) interp0->peek[2];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	240 // Ask lane 1 for a LERP, using the lane 0 accumulator
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	241 interp0->base[0] = sample_pair[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	242 interp0->base[1] = sample_pair[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	243 uint8_t peek = interp0->peek[1];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	244 // Apply DC offset scaling & clamp
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	245 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	246 data[idx++] = interp1->peek[0];
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	247 // Update interpolator for next point
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	248 interp0->add_raw[0] = stepsize;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	249 } else
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	250 // Already done it before, just copy the previous instance
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	251 data[idx++] = data[bit1startup + i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	252 }
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	253 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	254 bit1stopup = idx - 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	255 // Pulse down
7 4ad473648949 Copy pulse up in reverse for pulse down. Daniel O'Connor <darius@dons.net.au> parents: 6 diff changeset	256 // Since the pulse is symmetrical just copy the up slope in reverse
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	257 // XXX: if we had asymmetrical predistortion this wouldn't be true
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	258 for (uint16_t i = 0; i < shapesamples; i++) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	259 // Could replace this with a separate loop to poke it into place
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	260 // Similarly for TR switch when implemented
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	261 if (i == 0 && c == 0)
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	262 ctrl[idx] = ctrltmp \| SENSE1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	263 else
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	264 ctrl[idx] = ctrltmp;
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	265 data[idx++] = data[bit1stopup - i];
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	266 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	267
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	268 // Code gap
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	269 if (c < ncode - 1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	270 for (uint16_t i = 0; i < codegap; i++) {
19 2e14ccd1338a Set control data after shape data so it is lined up properly. Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	271 ctrl[idx] = ctrltmp;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	272 data[idx++] = dcofs;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	273 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	274 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	275
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	276 // Down slew
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	277 for (uint16_t i = 0; i < slew2 + 1; i++) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	278 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	279 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	280
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	281 data[idx++] = 0;
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	282 ctrl[idx] = 0;
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	283
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	284 return idx + 1;
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	285 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	286
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	287 int
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	288 main(void) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	289 absolute_time_t then, now;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	290
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	291 // Set sysclk to 120MHz
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	292 set_sys_clock_khz(120000, true);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	293
a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	294 stdio_init_all();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	295 printf("\n\n\nIniting\n");
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	296
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	297 // Needed otherwise timer related functions hang under debugging
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	298 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	299 timer_hw->dbgpause = 0;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	300
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	301 gpio_init(PICO_DEFAULT_LED_PIN);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	302 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	303 gpio_init(2);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	304 gpio_set_dir(2, GPIO_OUT);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	305
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	306 #if 0
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	307 // GPIO tester to check breadboard wiring
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	308 for (unsigned i = 7; i < 7 + 9; i++) {
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	309 printf("GPIO %d\n", i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	310 gpio_init(i);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	311 gpio_set_dir(i, GPIO_OUT);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	312 printf("on\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	313 gpio_put(i, 1);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	314 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	315 printf("off\n");
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	316 gpio_put(i, 0);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	317 __breakpoint();
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	318 }
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	319 #endif
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	320
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	321 uint32_t idx;
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	322 uint16_t plen;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	323 char *code;
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	324 if (1) {
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	325 plen = 8000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	326 code = "1110010";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	327 } else {
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	328 plen = 53000;
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	329 code = "1";
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	330 }
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	331
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	332 uint8_t codegap = 4;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	333 uint8_t slew1 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	334 uint8_t slew2 = 10;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	335 uint8_t dcofs = 110;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	336 then = get_absolute_time();
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	337 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	338 plen, code, strlen(code),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	339 shaped_trap, sizeof(shaped_trap),
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	340 codegap, slew1, slew2, dcofs)) == 0) {
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	341 printf("Failed to compute pulse\n");
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	342 while (1)
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	343 ;
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	344 }
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	345 now = get_absolute_time();
8 0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	346 unsigned long long diff = absolute_time_diff_us(then, now);
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	347 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
0249d0cecac4 Use interpolator to compute pulse up. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	348 diff, idx, (float)diff * 1000.0 / idx);
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	349 unsigned transfers = (idx + 3) >> 2;
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	350 printf("Using %u transfers\n", transfers);
10 98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger. Daniel O'Connor <darius@dons.net.au> parents: 9 diff changeset	351 //__breakpoint();
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	352
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	353 // Load the DAC program, and configure a free state machine
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	354 // to run the program.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	355 dac_pio_sm_offset = pio_add_program(pulse_pio, &dac_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	356 if (dac_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	357 printf("Unable to load DAC program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	358 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	359 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	360 dac_sm = pio_claim_unused_sm(pulse_pio, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	361 // Data is GPIO7 to GPIO14, clock is GPIO15
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	362 // Clock divisor of 2 so it runs at 60MHz and
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	363 // generates a 30MHz clock
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	364 dac_program_init(pulse_pio, dac_sm, dac_pio_sm_offset, DACOUT_GPIO, 2);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	365
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	366 // Configure a channel to write 32 bits at a time to PIO0
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	367 // SM0's TX FIFO, paced by the data request signal from that peripheral.
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	368 dac_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	369 dma_channel_config dac_dmac = dma_channel_get_default_config(dac_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	370 channel_config_set_transfer_data_size(&dac_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	371 channel_config_set_read_increment(&dac_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	372 channel_config_set_dreq(&dac_dmac, PIO_DREQ_NUM(pulse_pio, dac_sm, true));
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	373
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	374 dma_channel_configure(
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	375 dac_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	376 &dac_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	377 &pulse_pio->txf[dac_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	378 pulse_data, // Pulse data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	379 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	380 true // Start transfer
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	381 );
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	382
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	383 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	384 dma_channel_set_irq0_enabled(dac_dma_chan, true);
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	385
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	386 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	387 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	388 irq_set_enabled(DMA_IRQ_0, true);
3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	389
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	390 // Load the ctrl program, and configure a free state machine
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	391 // to run the program.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	392 ctrl_pio_sm_offset = pio_add_program(pulse_pio, &ctrl_program);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	393 if (ctrl_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	394 printf("Unable to load ctrl program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	395 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	396 }
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	397 ctrl_sm = pio_claim_unused_sm(pulse_pio, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	398 ctrl_program_init(pulse_pio, ctrl_sm, ctrl_pio_sm_offset, CTRLOUT_GPIO, 2);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	399
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	400 // Configure a channel to write 32 bits at a time to PIO0
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	401 // SM0's TX FIFO, paced by the data request signal from that peripheral.
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	402 ctrl_dma_chan = dma_claim_unused_channel(true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	403 dma_channel_config ctrl_dmac = dma_channel_get_default_config(ctrl_dma_chan);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	404 channel_config_set_transfer_data_size(&ctrl_dmac, DMA_SIZE_32);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	405 channel_config_set_read_increment(&ctrl_dmac, true);
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	406 channel_config_set_dreq(&ctrl_dmac, PIO_DREQ_NUM(pulse_pio, ctrl_sm, true));
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	407
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	408 dma_channel_configure(
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	409 ctrl_dma_chan,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	410 &ctrl_dmac,
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	411 &pulse_pio->txf[ctrl_sm], // Write address
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	412 pulse_ctrl, // Ctrl data
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	413 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	414 true // Start transfer
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	415 );
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	416 // No IRQ, piggyback on the data one
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	417
18 f1e44afb41a3 WIP with control and DAC in sync and not hanging. Daniel O'Connor <darius@dons.net.au> parents: 17 diff changeset	418 #ifdef WITH_TRIGGER
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	419 // Load the trigger program, and configure a free state machine
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	420 // to run the program.
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	421 uint trigger_pio_sm_offset = pio_add_program(pulse_pio, &trigger_program);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	422 if (trigger_pio_sm_offset < 0) {
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	423 printf("Unable to load trigger program\n");
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	424 __breakpoint();
56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	425 }
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	426 uint trigger_sm = pio_claim_unused_sm(pulse_pio, true);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	427 trigger_program_init(pulse_pio, trigger_sm, trigger_pio_sm_offset, TRIGIN_GPIO, 2);
16 56a79dce90e9 Commit WIP ctrl code Daniel O'Connor <darius@dons.net.au> parents: 11 diff changeset	428 #endif
24 c7845db23ab2 Add sideset for trigger output. Daniel O'Connor <darius@dons.net.au> parents: 23 diff changeset	429
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	430 //
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	431 // Setup PWM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	432 // Used here to output a trigger which gets fed back into the trigger SM
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	433 //
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	434 // 120MHz / 250 = 480kHz base
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	435 // Maximum divisor is only 256 which limits the low end,
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	436 // could further subdivide in the IRQ handler
9 3acdebd7eec7 Make it actually work Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	437 pwm_config c = pwm_get_default_config();
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	438 pwm_config_set_clkdiv_int(&c, 250);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	439 // 8Hz
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	440 pwm_config_set_wrap(&c, 60000 - 1);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	441
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	442 gpio_set_function(TRIGOUT_GPIO, GPIO_FUNC_PWM);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	443
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	444 slice_num = pwm_gpio_to_slice_num(TRIGOUT_GPIO);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	445 pwm_init(slice_num, &c, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	446 pwm_clear_irq(slice_num);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	447 pwm_set_chan_level(slice_num, PWM_CHAN_A, 1);
e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	448 pwm_set_enabled(slice_num, 1);
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	449 pwm_set_irq_enabled(slice_num, true);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	450 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	451 irq_set_enabled(PWM_IRQ_WRAP, true);
11 e9d12b36cfcc Use PWM output to feed PIO trigger Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	452
3 b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	453 // Everything else from this point is interrupt-driven. The processor has
b10097c3383d DMA test data repeatedly into PIO FIFO Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	454 // time to sit and think about its early retirement -- maybe open a bakery?
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	455 while (true) {
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	456 gpio_put(PICO_DEFAULT_LED_PIN, 1);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	457 sleep_ms(100);
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	458 gpio_put(PICO_DEFAULT_LED_PIN, 0);
2 0d653f60dec8 Actually get data moving out. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	459 sleep_ms(100);
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	460 }
5 2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	461
2db42eaba3c8 WIP Daniel O'Connor <darius@dons.net.au> parents: 3 diff changeset	462 __breakpoint();
0 a55e39064a71 First commit of code that compiles. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	463 }

Mercurial > ~darius > hgwebdir.cgi > modulator

annotate modulator.c @ 25:6070d2e66b4c