Mercurial > ~darius > hgwebdir.cgi > modulator
annotate ctrl.pio @ 28:600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Don't need to unroll the PIO loops.
Create PIo function to reset each PIO.
Check the DMA IRQ is for us - we get unknown IRQs which need to be ignored or things break.
| author | Daniel O'Connor <darius@dons.net.au> |
|---|---|
| date | Thu, 27 Feb 2025 13:58:37 +1030 |
| parents | e1d8fe3e418a |
| children |
| rev | line source |
|---|---|
| 16 | 1 ; |
| 2 ; Copyright (c) 2025 Daniel O'Connor | |
| 3 ; | |
| 4 | |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
5 .program ctrl |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
6 .define TRIGGER_IRQ 0 |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
7 |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
8 PUBLIC init: |
| 16 | 9 ; Assert all 0s |
| 10 mov pins, null | |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
11 nop |
| 16 | 12 ; Wait for start trigger and clear IRQ |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
13 wait 1 irq TRIGGER_IRQ |
| 16 | 14 .wrap_target |
|
27
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
15 out pins 8 [1] |
|
e1d8fe3e418a
Run PIOs at 1x with delays and sync.
Daniel O'Connor <darius@dons.net.au>
parents:
25
diff
changeset
|
16 nop [1] |
| 16 | 17 .wrap |
| 18 | |
| 19 % c-sdk { | |
| 20 static inline void ctrl_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) { | |
|
21
8d759cf5a9e7
Load correct program, use a separate IRQ
Daniel O'Connor <darius@dons.net.au>
parents:
18
diff
changeset
|
21 pio_sm_config c = ctrl_program_get_default_config(offset); |
| 16 | 22 |
| 23 // Set the OUT base pin to the provided `pin` parameter. | |
| 24 // Note: We only need 6 pins but pull a byte at a time to make | |
| 25 // generating the data simpler | |
| 26 sm_config_set_out_pins(&c, pin, 6); | |
| 27 // Set the pin directions to output at the PIO | |
| 28 pio_sm_set_consecutive_pindirs(pio, sm, pin, 6, true); | |
| 29 // Connect these GPIOs to this PIO block | |
| 30 for (int i = 0; i < 6; i++) | |
| 31 pio_gpio_init(pio, pin + i); | |
| 32 | |
| 33 sm_config_set_out_shift( | |
| 34 &c, | |
| 35 true, // Shift-to-right | |
| 36 true, // Autopull enabled | |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
37 8 // Autopull threshold (bits!) |
| 16 | 38 ); |
| 39 | |
| 40 // We only send, so disable the RX FIFO to make the TX FIFO deeper. | |
| 41 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX); | |
| 42 | |
| 43 sm_config_set_clkdiv(&c, clkdiv); | |
| 44 | |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
45 // Load our configuration (but don't start) |
| 16 | 46 pio_sm_init(pio, sm, offset, &c); |
| 47 } | |
|
28
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
48 |
|
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
49 static inline uint ctrl_reset_instr (uint offset) { |
|
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
50 // encode a "jmp init side 0" instruction for the state machine |
|
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
51 return pio_encode_jmp (offset + ctrl_offset_init); |
|
600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Daniel O'Connor <darius@dons.net.au>
parents:
27
diff
changeset
|
52 } |
| 16 | 53 %} |