annotate modulator.c @ 23:3c713073dd0c

Remove debug prints and #ifdef now the control code works.
author Daniel O'Connor <darius@dons.net.au>
date Tue, 25 Feb 2025 15:56:49 +1030
parents 6aaa9658df1e
children c7845db23ab2
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1 /******************************************************************
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2 *******************************************************************
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3 **
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4 ** This is proprietary unpublished source code, property
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5 ** of Genesis Software. Use or disclosure without prior
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6 ** agreement is expressly prohibited.
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7 **
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8 ** Copyright (c) 2025 Genesis Software, all rights reserved.
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9 **
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10 *******************************************************************
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11 ******************************************************************/
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13 /*
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14 ** MODULATOR.C
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15 **
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16 ** Create modulation shape
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17 **
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18 */
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19 //#define WITH_TRIGGER
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20
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21 #include <stdio.h>
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22 #include <string.h>
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23
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24 #pragma GCC diagnostic push
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25 #pragma GCC diagnostic ignored "-Wtype-limits"
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26 #pragma GCC diagnostic ignored "-Wsign-compare"
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27 #include "pico/stdlib.h"
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28 #include "hardware/clocks.h"
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29 #include "hardware/dma.h"
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30 #include "hardware/interp.h"
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31 #include "hardware/irq.h"
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32 #include "hardware/pll.h"
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33 #include "hardware/pio.h"
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34 #include "hardware/pwm.h"
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35 #include "hardware/structs/pll.h"
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36 #include "hardware/structs/clocks.h"
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37 #pragma GCC diagnostic pop
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39 #include "dac.pio.h"
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40 #include "ctrl.pio.h"
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41 #include "trigger.pio.h"
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42
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43 // https://github.com/howerj/q
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44 // Modified to be Q20.12 rather than Q16.16
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45 #include "q/q.h"
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46
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47 #include "shaped-trap.h"
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48
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49 // Base of DAC pins
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50 #define DACOUT_GPIO 7
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51 // Base of ctrl pins
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52 #define CTRLOUT_GPIO 16
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53 // PWM output pin
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54 #define TRIGOUT_GPIO 23
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55 // PIO SM trigger input pin (connected to above for testing)
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56 #define TRIGIN_GPIO 27
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57
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58 // Pulse control bits
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59 #define PACTIVE 0x01
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60 #define PHINV 0x02
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61 #define SENSE1 0x04
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62 #define SENSE2 0x08
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63 #define GATE 0x10
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64 #define TRSW 0x20
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65
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66 // Pulse shape data
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67 uint8_t pulse_data[65536] __attribute__((aligned(4)));
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68 // Pulse control data
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69 uint8_t pulse_ctrl[65536] __attribute__((aligned(4)));
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70 // PWM slice for PRF timer
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71 unsigned slice_num = 0;
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72
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73 // PIO for pulse generation
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74 PIO pulse_pio = pio0;
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75
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76 // DMA channel to feed DAC PIO
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77 static int dac_dma_chan;
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78 // DAC SM
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79 uint dac_sm;
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80 // Instruction offset for DAC PIO program
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81 uint dac_pio_sm_offset;
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82
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83 // DMA channel to feed ctrl PIO
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84 static int ctrl_dma_chan;
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85 // Ctrl SM
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86 uint ctrl_sm;
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87 // Instruction offset for ctrl PIO program
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88 uint ctrl_pio_sm_offset;
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89
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90 /*
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91 * Use a DMA channel to feed PIO0 SM0 with pulse data.
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92 * Each DMA transfer is a single pulse.
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93 *
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94 * The PIO state machine waits to be triggered before starting
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95 * so we can use another state machine to look for the trigger edge.
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96 *
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97 * When the DMA is done the IRQ handler will configure it for the next
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98 * pulse (or not if it should stop). ie reset the PIO state machine
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99 * back to waiting for an edge and re-arm the DMA.
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100 */
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101 void
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102 dma_handler(void) {
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103 // Clear the interrupt request.
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104 dma_hw->ints0 = 1u << dac_dma_chan;
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105
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106 #if 0
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107 printf("DAC transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
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108 printf("Ctrl transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
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109 #endif
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110
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111 // Reset DAQ & ctrl PIO SMs so they are waiting for a trigger
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112 pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset));
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113 pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset));
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114
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115 // Setup next pulse data & ctrl DMA addresses
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116 dma_channel_wait_for_finish_blocking(dac_dma_chan);
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117 dma_channel_set_read_addr(dac_dma_chan, pulse_data, true);
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118 dma_channel_wait_for_finish_blocking(ctrl_dma_chan);
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119 dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true);
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120 }
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121
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122
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123 void
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124 pwm_wrap(void) {
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125 pwm_clear_irq(slice_num);
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126
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127 #ifndef WITH_TRIGGER
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128 // Manually trigger DAQ SM (cleared by SM)
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129 pulse_pio->irq_force = 3;
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130
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131 // 'scope trigger
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132 gpio_put(2, 1);
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133 gpio_put(2, 0);
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134 #endif
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135 }
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136
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137 // Calculate pulse shape data
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138 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
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139 // Could encode them as bit stream like data but more compact would be
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140 // (say) a list of counts to toggle pins at
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141 // Need to add pre/postgate/sense/phase counters
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142 unsigned
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143 compute_pulse(uint8_t *data, uint8_t *ctrl, unsigned datalen, uint16_t plen, char *code, uint8_t ncode, const uint8_t *shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
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144 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
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145 q_t dcscale, stepsize;
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146 char tmps[20];
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147 interp_config cfg;
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148
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149 if (ncode == 1) {
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150 // Number of samples for half of the pulse
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151 // Do division first so we don't overflow Q16.16
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152 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
153 // Number of samples for everything
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
154 // XXX: Need the +1 otherwise slew2 is truncated
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
155 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
156 } else {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
157 shapesamples = plen / 2;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
158 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
159 }
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
160
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
161 // Number of steps per samples in the pulse shape
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
162 stepsize = qdiv(qint(shapelen), qint(shapesamples));
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
163 qsprint(stepsize, tmps, sizeof(tmps));
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
164 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
165
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
166 // Check the requested pulse will not overflow given data
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
167 if (nsamples > datalen) {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
168 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
169 return 0;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
170 }
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
171 // Check it is not too short
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
172 if (shapesamples < 2) {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
173 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
174 return 0;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
175 }
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
176 // Or too long (will overflow for loop variable)
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
177 if (qtoi(shapesamples) > 65535) {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
178 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
179 return 0;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
180 }
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
181
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
182 // Setup interp 0 lane 0 to generate index into shape table
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
183 // Mask start is 0 because we use 8 bit samples
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parents: 6
diff changeset
184 cfg = interp_default_config();
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diff changeset
185 interp_config_set_shift(&cfg, QBITS);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
186 interp_config_set_mask(&cfg, 0, 32 - QBITS);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
187 interp_config_set_blend(&cfg, true);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
188 interp_set_config(interp0, 0, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
189
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
190 // Setup interp 0 lane 1 to LERP each sample pair
7
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
191 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
192 interp_config_set_shift(&cfg, QBITS - 8);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
193 interp_config_set_signed(&cfg, false);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
194 interp_config_set_cross_input(&cfg, true); // unsigned blending
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
195 interp_set_config(interp0, 1, &cfg);
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
196
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
197 // Setup interp 1 lane 0 to clamp 0-255
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
198 cfg = interp_default_config();
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
199 interp_config_set_clamp(&cfg, true);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
200 interp_config_set_shift(&cfg, 0);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
201 interp_config_set_mask(&cfg, 0, 8);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
202 interp_config_set_signed(&cfg, false);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
203 interp_set_config(interp1, 0, &cfg);
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
204 interp1->base[0] = 0;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
205 interp1->base[1] = 255;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
206
7
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
207 interp0->accum[0] = 0; // Initial offset into shape table
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
208 interp0->base[2] = (uintptr_t)shape; // Start of shape table
5
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parents: 3
diff changeset
209
8
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
210 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
211 qsprint(dcscale, tmps, sizeof(tmps));
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
212 printf("dcscale = %s\n", tmps);
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
213
16
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
214 memset(pulse_data, 0, datalen);
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
215 memset(pulse_ctrl, 0, datalen);
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
216 idx = 0;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
217
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
218 // Up slew
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
219 for (uint16_t i = 0; i < slew1; i++) {
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
220 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
221 }
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
222 for (uint16_t c = 0; c < ncode; c++) {
7
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
223 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
224 bit1startup = idx;
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
225
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
226 uint ctrltmp = PACTIVE;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
227 if (code[c] == '0')
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
228 ctrltmp |= PHINV;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
229
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
230 // Pulse up
8
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
231 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
232 interp0->accum[0] = 0; // Initial offset into shape table
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
233 interp0->base[2] = (uintptr_t)shape; // Start of shape table
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
234 }
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
235 for (uint16_t i = 0; i < shapesamples; i++) {
19
2e14ccd1338a Set control data after shape data so it is lined up properly.
Daniel O'Connor <darius@dons.net.au>
parents: 18
diff changeset
236 ctrl[idx] = ctrltmp;
8
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
237 if (c == 0) {
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
238 // Get sample pair
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
239 uint8_t *sample_pair = (uint8_t *) interp0->peek[2];
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
240 // Ask lane 1 for a LERP, using the lane 0 accumulator
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
241 interp0->base[0] = sample_pair[0];
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
242 interp0->base[1] = sample_pair[1];
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
243 uint8_t peek = interp0->peek[1];
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
244 // Apply DC offset scaling & clamp
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
245 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
246 data[idx++] = interp1->peek[0];
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
247 // Update interpolator for next point
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
248 interp0->add_raw[0] = stepsize;
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
249 } else
7
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
250 // Already done it before, just copy the previous instance
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
251 data[idx++] = data[bit1startup + i];
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
252 }
7
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
253 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
254 bit1stopup = idx - 1;
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
255 // Pulse down
7
4ad473648949 Copy pulse up in reverse for pulse down.
Daniel O'Connor <darius@dons.net.au>
parents: 6
diff changeset
256 // Since the pulse is symmetrical just copy the up slope in reverse
8
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
257 // XXX: if we had asymmetrical predistortion this wouldn't be true
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
258 for (uint16_t i = 0; i < shapesamples; i++) {
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
259 // Could replace this with a separate loop to poke it into place
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
260 // Similarly for TR switch when implemented
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
261 if (i == 0 && c == 0)
16
56a79dce90e9 Commit WIP ctrl code
Daniel O'Connor <darius@dons.net.au>
parents: 11
diff changeset
262 ctrl[idx] = ctrltmp | SENSE1;
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
263 else
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
264 ctrl[idx] = ctrltmp;
19
2e14ccd1338a Set control data after shape data so it is lined up properly.
Daniel O'Connor <darius@dons.net.au>
parents: 18
diff changeset
265 data[idx++] = data[bit1stopup - i];
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
266 }
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
267
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
268 // Code gap
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
269 if (c < ncode - 1)
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
270 for (uint16_t i = 0; i < codegap; i++) {
19
2e14ccd1338a Set control data after shape data so it is lined up properly.
Daniel O'Connor <darius@dons.net.au>
parents: 18
diff changeset
271 ctrl[idx] = ctrltmp;
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
272 data[idx++] = dcofs;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
273 }
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
274 }
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
275
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
276 // Down slew
8
0249d0cecac4 Use interpolator to compute pulse up.
Daniel O'Connor <darius@dons.net.au>
parents: 7
diff changeset
277 for (uint16_t i = 0; i < slew2 + 1; i++) {
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
278 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
279 }
11
e9d12b36cfcc Use PWM output to feed PIO trigger
Daniel O'Connor <darius@dons.net.au>
parents: 10
diff changeset
280
e9d12b36cfcc Use PWM output to feed PIO trigger
Daniel O'Connor <darius@dons.net.au>
parents: 10
diff changeset
281 data[idx++] = 0;
16
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
282 ctrl[idx] = 0;
11
e9d12b36cfcc Use PWM output to feed PIO trigger
Daniel O'Connor <darius@dons.net.au>
parents: 10
diff changeset
283
16
56a79dce90e9 Commit WIP ctrl code
Daniel O'Connor <darius@dons.net.au>
parents: 11
diff changeset
284 return idx + 1;
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
285 }
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
286
0
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
287 int
3
b10097c3383d DMA test data repeatedly into PIO FIFO
Daniel O'Connor <darius@dons.net.au>
parents: 2
diff changeset
288 main(void) {
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
289 absolute_time_t then, now;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
290
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
291 // Set sysclk to 120MHz
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
292 set_sys_clock_khz(120000, true);
0
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
293
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
294 stdio_init_all();
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
295 printf("\n\n\nIniting\n");
0
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
296
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
297 // Needed otherwise timer related functions hang under debugging
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
298 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
299 timer_hw->dbgpause = 0;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
300
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
301 gpio_init(PICO_DEFAULT_LED_PIN);
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
302 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
9
3acdebd7eec7 Make it actually work
Daniel O'Connor <darius@dons.net.au>
parents: 8
diff changeset
303 gpio_init(2);
3acdebd7eec7 Make it actually work
Daniel O'Connor <darius@dons.net.au>
parents: 8
diff changeset
304 gpio_set_dir(2, GPIO_OUT);
11
e9d12b36cfcc Use PWM output to feed PIO trigger
Daniel O'Connor <darius@dons.net.au>
parents: 10
diff changeset
305
9
3acdebd7eec7 Make it actually work
Daniel O'Connor <darius@dons.net.au>
parents: 8
diff changeset
306 #if 0
16
56a79dce90e9 Commit WIP ctrl code
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307 // GPIO tester to check breadboard wiring
9
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308 for (unsigned i = 7; i < 7 + 9; i++) {
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309 printf("GPIO %d\n", i);
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310 gpio_init(i);
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311 gpio_set_dir(i, GPIO_OUT);
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312 printf("on\n");
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313 gpio_put(i, 1);
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314 __breakpoint();
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315 printf("off\n");
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316 gpio_put(i, 0);
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317 __breakpoint();
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318 }
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319 #endif
5
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320
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321 uint32_t idx;
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322 uint16_t plen;
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323 char *code;
9
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324 if (1) {
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325 plen = 8000;
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326 code = "1110010";
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327 } else {
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328 plen = 53000;
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329 code = "1";
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330 }
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331
5
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332 uint8_t codegap = 4;
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333 uint8_t slew1 = 10;
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334 uint8_t slew2 = 10;
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335 uint8_t dcofs = 110;
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336 then = get_absolute_time();
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337 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
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338 plen, code, strlen(code),
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339 shaped_trap, sizeof(shaped_trap),
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340 codegap, slew1, slew2, dcofs)) == 0) {
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341 printf("Failed to compute pulse\n");
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342 while (1)
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343 ;
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344 }
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345 now = get_absolute_time();
8
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346 unsigned long long diff = absolute_time_diff_us(then, now);
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347 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
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348 diff, idx, (float)diff * 1000.0 / idx);
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349 unsigned transfers = (idx + 3) >> 2;
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350 printf("Using %u transfers\n", transfers);
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98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger.
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351 //__breakpoint();
9
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352
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353 // Load the DAC program, and configure a free state machine
9
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354 // to run the program.
16
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355 dac_pio_sm_offset = pio_add_program(pulse_pio, &dac_program);
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356 if (dac_pio_sm_offset < 0) {
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357 printf("Unable to load DAC program\n");
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358 __breakpoint();
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359 }
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360 dac_sm = pio_claim_unused_sm(pulse_pio, true);
9
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361 // Data is GPIO7 to GPIO14, clock is GPIO15
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362 // Clock divisor of 2 so it runs at 60MHz and
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diff changeset
363 // generates a 30MHz clock
16
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364 dac_program_init(pulse_pio, dac_sm, dac_pio_sm_offset, DACOUT_GPIO, 2);
9
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365
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366 // Configure a channel to write 32 bits at a time to PIO0
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367 // SM0's TX FIFO, paced by the data request signal from that peripheral.
16
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368 dac_dma_chan = dma_claim_unused_channel(true);
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369 dma_channel_config dac_dmac = dma_channel_get_default_config(dac_dma_chan);
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370 channel_config_set_transfer_data_size(&dac_dmac, DMA_SIZE_32);
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371 channel_config_set_read_increment(&dac_dmac, true);
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372 channel_config_set_dreq(&dac_dmac, PIO_DREQ_NUM(pulse_pio, dac_sm, true));
9
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373
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374 dma_channel_configure(
16
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diff changeset
375 dac_dma_chan,
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diff changeset
376 &dac_dmac,
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377 &pulse_pio->txf[dac_sm], // Write address
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diff changeset
378 pulse_data, // Pulse data
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379 transfers, // Transfer count
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380 true // Start transfer
9
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diff changeset
381 );
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diff changeset
382
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diff changeset
383 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
16
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diff changeset
384 dma_channel_set_irq0_enabled(dac_dma_chan, true);
9
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diff changeset
385
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diff changeset
386 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
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diff changeset
387 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
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diff changeset
388 irq_set_enabled(DMA_IRQ_0, true);
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diff changeset
389
16
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diff changeset
390 // Load the ctrl program, and configure a free state machine
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diff changeset
391 // to run the program.
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diff changeset
392 ctrl_pio_sm_offset = pio_add_program(pulse_pio, &ctrl_program);
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parents: 11
diff changeset
393 if (ctrl_pio_sm_offset < 0) {
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diff changeset
394 printf("Unable to load ctrl program\n");
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diff changeset
395 __breakpoint();
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diff changeset
396 }
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diff changeset
397 ctrl_sm = pio_claim_unused_sm(pulse_pio, true);
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parents: 11
diff changeset
398 ctrl_program_init(pulse_pio, ctrl_sm, ctrl_pio_sm_offset, CTRLOUT_GPIO, 2);
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parents: 11
diff changeset
399
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diff changeset
400 // Configure a channel to write 32 bits at a time to PIO0
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parents: 11
diff changeset
401 // SM0's TX FIFO, paced by the data request signal from that peripheral.
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
402 ctrl_dma_chan = dma_claim_unused_channel(true);
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parents: 11
diff changeset
403 dma_channel_config ctrl_dmac = dma_channel_get_default_config(ctrl_dma_chan);
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
404 channel_config_set_transfer_data_size(&ctrl_dmac, DMA_SIZE_32);
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parents: 11
diff changeset
405 channel_config_set_read_increment(&ctrl_dmac, true);
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
406 channel_config_set_dreq(&ctrl_dmac, PIO_DREQ_NUM(pulse_pio, ctrl_sm, true));
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
407
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parents: 11
diff changeset
408 dma_channel_configure(
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
409 ctrl_dma_chan,
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
410 &ctrl_dmac,
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diff changeset
411 &pulse_pio->txf[ctrl_sm], // Write address
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parents: 11
diff changeset
412 pulse_ctrl, // Ctrl data
18
f1e44afb41a3 WIP with control and DAC in sync and not hanging.
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parents: 17
diff changeset
413 transfers, // Transfer count
f1e44afb41a3 WIP with control and DAC in sync and not hanging.
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parents: 17
diff changeset
414 true // Start transfer
16
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
415 );
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parents: 11
diff changeset
416 // No IRQ, piggyback on the data one
56a79dce90e9 Commit WIP ctrl code
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parents: 11
diff changeset
417
18
f1e44afb41a3 WIP with control and DAC in sync and not hanging.
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parents: 17
diff changeset
418 #ifdef WITH_TRIGGER
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
419 // Load the trigger program, and configure a free state machine
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
420 // to run the program.
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
421 uint trigger_pio_sm_offset = pio_add_program(pulse_pio, &trigger_program);
16
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parents: 11
diff changeset
422 if (trigger_pio_sm_offset < 0) {
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diff changeset
423 printf("Unable to load trigger program\n");
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diff changeset
424 __breakpoint();
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parents: 11
diff changeset
425 }
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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diff changeset
426 uint trigger_sm = pio_claim_unused_sm(pulse_pio, true);
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
427 trigger_program_init(pulse_pio, trigger_sm, trigger_pio_sm_offset, TRIGIN_GPIO, 2);
16
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parents: 11
diff changeset
428 #endif
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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diff changeset
429 //
e9d12b36cfcc Use PWM output to feed PIO trigger
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diff changeset
430 // Setup PWM
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
431 // Used here to output a trigger which gets fed back into the trigger SM
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
432 //
5
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parents: 3
diff changeset
433 // 120MHz / 250 = 480kHz base
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parents: 3
diff changeset
434 // Maximum divisor is only 256 which limits the low end,
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parents: 3
diff changeset
435 // could further subdivide in the IRQ handler
9
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
436 pwm_config c = pwm_get_default_config();
5
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parents: 3
diff changeset
437 pwm_config_set_clkdiv_int(&c, 250);
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parents: 3
diff changeset
438 // 8Hz
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parents: 3
diff changeset
439 pwm_config_set_wrap(&c, 60000 - 1);
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
440
e9d12b36cfcc Use PWM output to feed PIO trigger
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diff changeset
441 gpio_set_function(TRIGOUT_GPIO, GPIO_FUNC_PWM);
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
442
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
443 slice_num = pwm_gpio_to_slice_num(TRIGOUT_GPIO);
5
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parents: 3
diff changeset
444 pwm_init(slice_num, &c, true);
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parents: 3
diff changeset
445 pwm_clear_irq(slice_num);
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
446 pwm_set_chan_level(slice_num, PWM_CHAN_A, 1);
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
447 pwm_set_enabled(slice_num, 1);
5
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parents: 3
diff changeset
448 pwm_set_irq_enabled(slice_num, true);
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parents: 3
diff changeset
449 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
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parents: 3
diff changeset
450 irq_set_enabled(PWM_IRQ_WRAP, true);
11
e9d12b36cfcc Use PWM output to feed PIO trigger
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parents: 10
diff changeset
451
3
b10097c3383d DMA test data repeatedly into PIO FIFO
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parents: 2
diff changeset
452 // Everything else from this point is interrupt-driven. The processor has
b10097c3383d DMA test data repeatedly into PIO FIFO
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parents: 2
diff changeset
453 // time to sit and think about its early retirement -- maybe open a bakery?
0
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
454 while (true) {
5
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parents: 3
diff changeset
455 gpio_put(PICO_DEFAULT_LED_PIN, 1);
Daniel O'Connor <darius@dons.net.au>
parents: 3
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456 sleep_ms(100);
Daniel O'Connor <darius@dons.net.au>
parents: 3
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457 gpio_put(PICO_DEFAULT_LED_PIN, 0);
2
0d653f60dec8 Actually get data moving out.
Daniel O'Connor <darius@dons.net.au>
parents: 0
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458 sleep_ms(100);
0
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
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459 }
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
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460
Daniel O'Connor <darius@dons.net.au>
parents: 3
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461 __breakpoint();
0
a55e39064a71 First commit of code that compiles.
Daniel O'Connor <darius@dons.net.au>
parents:
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462 }