annotate fifo.veo @ 1:f88da01700da GSOFT-MEMEC-1-REL

Initial import of test project for Memec 3SxLC board with Xilinx XC3S400. Uses a FIFO and flashes some LEDs.
author darius
date Fri, 24 Feb 2006 14:01:25 +0000
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
1 /*******************************************************************************
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
2 * This file is owned and controlled by Xilinx and must be used *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
3 * solely for design, simulation, implementation and creation of *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
4 * design files limited to Xilinx devices or technologies. Use *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
5 * with non-Xilinx devices or technologies is expressly prohibited *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
6 * and immediately terminates your license. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
7 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
8 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
9 * SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
10 * XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
11 * AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
12 * OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
13 * IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
14 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
15 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
16 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
17 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
18 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
19 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
20 * FOR A PARTICULAR PURPOSE. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
21 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
22 * Xilinx products are not intended for use in life support *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
23 * appliances, devices, or systems. Use in such applications are *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
24 * expressly prohibited. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
25 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
26 * (c) Copyright 1995-2006 Xilinx, Inc. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
27 * All rights reserved. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
28 *******************************************************************************/
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
29 // The following must be inserted into your Verilog file for this
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
30 // core to be instantiated. Change the instance name and port connections
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
31 // (in parentheses) to your own signal names.
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
32
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
33 //----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
34 fifo YourInstanceName (
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
35 .din(din),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
36 .wr_en(wr_en),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
37 .wr_clk(wr_clk),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
38 .rd_en(rd_en),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
39 .rd_clk(rd_clk),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
40 .ainit(ainit),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
41 .dout(dout),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
42 .full(full),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
43 .empty(empty));
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
44
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
45 // INST_TAG_END ------ End INSTANTIATION Template ---------
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
46
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
47 // You must compile the wrapper file fifo.v when simulating
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
48 // the core, fifo. When compiling the wrapper file, be sure to
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
49 // reference the XilinxCoreLib Verilog simulation library. For detailed
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
50 // instructions, please refer to the "CORE Generator Help".
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
51