Mercurial > ~darius > hgwebdir.cgi > stm32test
annotate main.c @ 1:7a08db98ae8b
Split out compile flags for easier editing.
Allow toolchain suffixes (needed for when arm-elf works).
Add debug target.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Sat, 08 Oct 2011 20:33:47 +1030 |
parents | c59513fd84fb |
children | 274e01fa5a4c |
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1 #include <ctype.h> |
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2 #include <stdio.h> |
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3 #include <stdint.h> |
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4 #include "stm32f10x.h" |
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5 #include "main.h" |
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6 #include "comm.h" |
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7 |
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8 USART_InitTypeDef USART_InitStructure; |
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9 |
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10 void Setup_HW(void); |
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11 void NVIC_Configuration(void); |
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12 |
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13 /* Called every millisecond */ |
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14 RAMFUNC void |
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15 SysTick_Handler(void) { |
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16 static uint32_t tick; |
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17 |
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18 tick++; |
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19 } |
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20 |
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21 RAMFUNC void |
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22 USART1_IRQHandler(void) { |
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23 |
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24 } |
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25 |
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26 typedef volatile struct { |
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27 char buf[40]; |
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28 uint8_t state; |
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29 uint8_t len; |
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30 } consbuf_t; |
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31 |
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32 int |
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33 main(void) { |
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34 consbuf_t cmd; |
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35 char c; |
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36 int idx; |
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37 |
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38 cmd.state = cmd.len = 0; |
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39 |
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40 /* Setup USART etc */ |
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41 Setup_HW(); |
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42 |
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43 /* NVIC configuration */ |
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44 NVIC_Configuration(); |
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45 |
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46 /* Setup SysTick Timer for 1 millisecond interrupts, also enables Systick and Systick-Interrupt */ |
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47 if (SysTick_Config(SystemCoreClock / 1000)) { |
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48 /* Capture error */ |
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49 comm_puts("Can't setup SysTick\r\n"); |
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50 while (1) |
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51 ; |
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52 } |
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53 |
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54 /* Say hello */ |
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55 comm_puts("\r\nHello world\r\n"); |
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56 idx = 0; |
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57 |
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58 while (1) { |
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59 comm_puts("> "); |
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60 while (1) { |
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61 c = comm_get(); |
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62 |
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63 /* End of line? */ |
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64 if (c == '\n' || c == '\r') { |
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65 cmd.buf[cmd.state] = '\0'; |
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66 printf("\r\n"); |
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67 cmd.len = cmd.state; |
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68 cmd.state = 255; |
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69 break; |
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70 } |
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71 |
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72 /* Backspace/delete */ |
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73 if (c == 0x08 || c == 0x7f) { |
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74 if (cmd.state > 0) { |
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75 cmd.state--; |
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76 printf("\177\040\177"); |
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77 } |
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78 continue; |
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79 } |
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80 |
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81 /* Anything unprintable just ignore it */ |
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82 if (!isprint(c)) |
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83 continue; |
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84 cmd.buf[cmd.state] = tolower(c); |
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85 |
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86 /* Echo back to the user */ |
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87 comm_put(cmd.buf[cmd.state]); |
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88 |
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89 cmd.state++; |
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90 /* Over flow? */ |
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91 if (cmd.state == ((sizeof(cmd.buf) / sizeof(cmd.buf[0])) - 1)) { |
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92 printf("\r\nLine too long"); |
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93 cmd.state = 0; |
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94 continue; |
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95 } |
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96 } |
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97 if (cmd.len > 0) |
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98 printf("Got command '%s'\r\n", cmd.buf); |
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99 cmd.state = 0; |
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100 } |
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101 } |
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102 |
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103 /* Setup hardware (USART etc) */ |
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104 void |
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105 Setup_HW(void) { |
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106 GPIO_InitTypeDef GPIO_InitStructure; |
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107 |
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108 /* Enable USART1, GPIOA, GPIOD and AFIO clocks */ |
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109 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA |RCC_APB2Periph_GPIOD |
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110 | RCC_APB2Periph_AFIO, ENABLE); |
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111 /* Enable USART2 clock */ |
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112 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); |
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113 |
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114 /* DMA1 clock enable */ |
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115 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); |
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116 |
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117 /* Configure USART1 TX (PA.09) as alternate function push-pull */ |
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118 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; |
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119 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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120 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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121 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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122 |
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123 /* Configure USART1 RX (PA.10) as input floating */ |
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124 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; |
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125 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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126 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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127 |
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128 /* Init UART1 - 115200 8n1, no flow control TX & RX enabled */ |
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129 USART_InitStructure.USART_BaudRate = 115200; |
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130 USART_InitStructure.USART_WordLength = USART_WordLength_8b; |
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131 USART_InitStructure.USART_StopBits = USART_StopBits_1; |
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132 USART_InitStructure.USART_Parity = USART_Parity_No; |
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133 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; |
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134 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; |
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135 |
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136 /* Configure USART1 */ |
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137 USART_Init(USART1, &USART_InitStructure); |
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Daniel O'Connor <darius@dons.net.au>
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138 |
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139 /* Enable the USART1 */ |
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140 USART_Cmd(USART1, ENABLE); |
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Daniel O'Connor <darius@dons.net.au>
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141 } |
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142 |
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143 /* Configure interrupt controller */ |
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144 #ifdef VECT_TAB_RAM |
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145 /* vector-offset (TBLOFF) from bottom of SRAM. defined in linker script */ |
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146 extern uint32_t _isr_vectorsram_offs; |
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147 void |
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148 NVIC_Configuration(void) { |
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149 /* Set the Vector Table base location at 0x20000000+_isr_vectorsram_offs */ |
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150 NVIC_SetVectorTable(NVIC_VectTab_RAM, (uint32_t)&_isr_vectorsram_offs); |
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151 } |
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152 #else |
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153 extern uint32_t _isr_vectorsflash_offs; |
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154 void |
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155 NVIC_Configuration(void) { |
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156 /* Set the Vector Table base location at 0x08000000+_isr_vectorsflash_offs */ |
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157 NVIC_SetVectorTable(NVIC_VectTab_FLASH, (uint32_t)&_isr_vectorsflash_offs); |
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158 } |
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159 #endif /* VECT_TAB_RAM */ |