view main.c @ 0:c59513fd84fb

Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
parents
children 274e01fa5a4c
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#include <ctype.h>
#include <stdio.h>
#include <stdint.h>
#include "stm32f10x.h"
#include "main.h"
#include "comm.h"

USART_InitTypeDef USART_InitStructure;

void Setup_HW(void);
void NVIC_Configuration(void);

/* Called every millisecond */
RAMFUNC void
SysTick_Handler(void) {
    static uint32_t	tick;
   
    tick++;
}

RAMFUNC void
USART1_IRQHandler(void) {
    
}

typedef volatile struct {
    char	buf[40];
    uint8_t	state;
    uint8_t	len;
} consbuf_t;

int
main(void) {
    consbuf_t	cmd;
    char	c;
    int		idx;

    cmd.state = cmd.len = 0;
    
    /* Setup USART etc */
    Setup_HW();

    /* NVIC configuration */
    NVIC_Configuration();

    /* Setup SysTick Timer for 1 millisecond interrupts, also enables Systick and Systick-Interrupt */
    if (SysTick_Config(SystemCoreClock / 1000)) {
	/* Capture error */
	comm_puts("Can't setup SysTick\r\n");
	while (1)
	    ;
    }

    /* Say hello */
    comm_puts("\r\nHello world\r\n");
    idx = 0;
    
    while (1) {
	comm_puts("> ");
	while (1) {
	    c = comm_get();
	
	    /* End of line? */
	    if (c == '\n' || c == '\r') {
		cmd.buf[cmd.state] = '\0';
		printf("\r\n");
		cmd.len = cmd.state;
		cmd.state = 255;
		break;
	    }
	
	    /* Backspace/delete */
	    if (c == 0x08 || c == 0x7f) {
		if (cmd.state > 0) {
		    cmd.state--;
		    printf("\177\040\177");
		}
		continue;
	    }
	
	    /* Anything unprintable just ignore it */
	    if (!isprint(c))
		continue;
	    cmd.buf[cmd.state] = tolower(c);

	    /* Echo back to the user */
	    comm_put(cmd.buf[cmd.state]);
	
	    cmd.state++;
	    /* Over flow? */
	    if (cmd.state == ((sizeof(cmd.buf) / sizeof(cmd.buf[0])) - 1)) {
		printf("\r\nLine too long");
		cmd.state = 0;
		continue;
	    }
	}
	if (cmd.len > 0)
	    printf("Got command '%s'\r\n", cmd.buf);
	cmd.state = 0;
    }
}

/* Setup hardware (USART etc) */
void
Setup_HW(void) {
    GPIO_InitTypeDef GPIO_InitStructure;

    /* Enable USART1, GPIOA, GPIOD and AFIO clocks */
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA |RCC_APB2Periph_GPIOD
			   | RCC_APB2Periph_AFIO, ENABLE);
    /* Enable USART2 clock */
    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);

    /* DMA1 clock enable */
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

    /* Configure USART1 TX (PA.09) as alternate function push-pull */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
    GPIO_Init(GPIOA, &GPIO_InitStructure);

    /* Configure USART1 RX (PA.10) as input floating */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
    GPIO_Init(GPIOA, &GPIO_InitStructure);

    /* Init UART1 - 115200 8n1, no flow control TX & RX enabled */
    USART_InitStructure.USART_BaudRate = 115200;
    USART_InitStructure.USART_WordLength = USART_WordLength_8b;
    USART_InitStructure.USART_StopBits = USART_StopBits_1;
    USART_InitStructure.USART_Parity = USART_Parity_No;
    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
    USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;

    /* Configure USART1 */
    USART_Init(USART1, &USART_InitStructure);

    /* Enable the USART1 */
    USART_Cmd(USART1, ENABLE);
}

/* Configure interrupt controller */
#ifdef VECT_TAB_RAM
/* vector-offset (TBLOFF) from bottom of SRAM. defined in linker script */
extern uint32_t _isr_vectorsram_offs;
void
NVIC_Configuration(void) {
    /* Set the Vector Table base location at 0x20000000+_isr_vectorsram_offs */
    NVIC_SetVectorTable(NVIC_VectTab_RAM, (uint32_t)&_isr_vectorsram_offs);
}
#else
extern uint32_t _isr_vectorsflash_offs;
void
NVIC_Configuration(void) {
    /* Set the Vector Table base location at 0x08000000+_isr_vectorsflash_offs */
    NVIC_SetVectorTable(NVIC_VectTab_FLASH, (uint32_t)&_isr_vectorsflash_offs);
}
#endif /* VECT_TAB_RAM */