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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 @page TIM_OCActive TIM OC Active example
3
4 @verbatim
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
6 * @file TIM/OCActive/readme.txt
7 * @author MCD Application Team
8 * @version V3.5.0
9 * @date 08-April-2011
10 * @brief Description of the TIM OC Active example.
11 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 ******************************************************************************
19 @endverbatim
20
21 @par Example Description
22
23 This example shows how to configure the TIM peripheral to generate four different
24 signals with four different delays.
25
26 The TIM3CLK frequency is set to SystemCoreClock / 2 (Hz), and the objective is
27 to get TIM3 counter clock at 1 KHz so the Prescaler is computed as following:
28 - Prescaler = (TIM3CLK / TIM3 counter clock) - 1
29 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density
30 and Connectivity line devices and to 24 MHz for Low-Density Value line,
31 Medium-Density Value line and High-Density Value line devices.
32
33 The TIM3 CCR1 register value is equal to 1000:
34 TIM3_CH1 delay = CCR1_Val/TIM3 counter clock = 1000 ms
35 so the TIM3 Channel 1 generates a signal with a delay equal to 1000 ms.
36
37 The TIM3 CCR2 register value is equal to 500:
38 TIM3_CH2 delay = CCR2_Val/TIM3 counter clock = 500 ms
39 so the TIM3 Channel 2 generates a signal with a delay equal to 500 ms.
40
41 The TIM3 CCR3 register value is equal to 250:
42 TIM3_CH3 delay = CCR3_Val/TIM3 counter clock = 250 ms
43 so the TIM3 Channel 3 generates a signal with a delay equal to 250 ms.
44
45 The TIM3 CCR4 register value is equal to 125:
46 TIM3_CH4 delay = CCR4_Val/TIM3 counter clock = 125 ms
47 so the TIM3 Channel 4 generates a signal with a delay equal to 125 ms.
48
49 The delay correspond to the time difference between PC.06 and
50 TIM3_CHx signal rising edges in case of STM32100E-EVAL, STM32100B-EVAL, STM3210E-EVAL
51 and STM3210B-EVAL
52
53 The delay correspond to the time difference between PD.07 and
54 TIM3_CHx signal rising edges in case of STM3210C-EVAL
55
56 @par Directory contents
57
58 - TIM/OCActive/stm32f10x_conf.h Library Configuration file
59 - TIM/OCActive/stm32f10x_it.c Interrupt handlers
60 - TIM/OCActive/stm32f10x_it.h Interrupt handlers header file
61 - TIM/OCActive/main.c Main program
62 - TIM/OCActive/system_stm32f10x.c STM32F10x system source file
63
64 @par Hardware and Software environment
65
66
67 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
68 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
69 and Low-Density Value line Devices.
70
71 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
72 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line),
73 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
74 evaluation boards and can be easily tailored to any other supported device
75 and development board.
76
77
78 - STM3210C-EVAL Set-up
79 - Connect the TIM3 pins(TIM3 full remapped pins) to an oscilloscope to
80 monitor the different waveforms:
81 - PD.07
82 - PC.06 (TIM3_CH1)
83 - PC.07 (TIM3_CH2)
84 - PC.08 (TIM3_CH3)
85 - PC.09 (TIM3_CH4)
86
87 - STM32100E-EVAL, STM32100B-EVAL, STM3210E-EVAL and STM3210B-EVAL Set-up
88 - Connect the following pins to an oscilloscope to monitor the different
89 waveforms:
90 - PC.06
91 - PA.06 (TIM3_CH1)
92 - PA.07 (TIM3_CH2)
93 - PB.00 (TIM3_CH3)
94 - PB.01 (TIM3_CH4)
95
96 @par How to use it ?
97
98 In order to make the program work, you must do the following :
99 - Copy all source files from this example folder to the template folder under
100 Project\STM32F10x_StdPeriph_Template
101 - Open your preferred toolchain
102 - Rebuild all files and load your image into target memory
103 - Run the example
104
105 @note
106 - Low-density Value line devices are STM32F100xx microcontrollers where the
107 Flash memory density ranges between 16 and 32 Kbytes.
108 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
109 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
110 - Medium-density Value line devices are STM32F100xx microcontrollers where
111 the Flash memory density ranges between 64 and 128 Kbytes.
112 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
113 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
114 - High-density Value line devices are STM32F100xx microcontrollers where
115 the Flash memory density ranges between 256 and 512 Kbytes.
116 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
117 the Flash memory density ranges between 256 and 512 Kbytes.
118 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
119 the Flash memory density ranges between 512 and 1024 Kbytes.
120 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
121
122 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
123 */