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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/Cascade_Synchro/main.c @ 0:c59513fd84fb

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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 ******************************************************************************
3 * @file TIM/Cascade_Synchro/main.c
4 * @author MCD Application Team
5 * @version V3.5.0
6 * @date 08-April-2011
7 * @brief Main program body
8 ******************************************************************************
9 * @attention
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
20 */
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Examples
26 * @{
27 */
28
29 /** @addtogroup TIM_Cascade_Synchro
30 * @{
31 */
32
33 /* Private typedef -----------------------------------------------------------*/
34 /* Private define ------------------------------------------------------------*/
35 /* Private macro -------------------------------------------------------------*/
36 /* Private variables ---------------------------------------------------------*/
37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
38 TIM_OCInitTypeDef TIM_OCInitStructure;
39
40 /* Private function prototypes -----------------------------------------------*/
41 void RCC_Configuration(void);
42 void GPIO_Configuration(void);
43
44 /* Private functions ---------------------------------------------------------*/
45
46 /**
47 * @brief Main program
48 * @param None
49 * @retval None
50 */
51 int main(void)
52 {
53 /*!< At this stage the microcontroller clock setting is already configured,
54 this is done through SystemInit() function which is called from startup
55 file (startup_stm32f10x_xx.s) before to branch to application main.
56 To reconfigure the default setting of SystemInit() function, refer to
57 system_stm32f10x.c file
58 */
59
60 /* System Clocks Configuration */
61 RCC_Configuration();
62
63 /* GPIO Configuration */
64 GPIO_Configuration();
65
66 /* Timers synchronisation in cascade mode ----------------------------
67 1/TIM2 is configured as Master Timer:
68 - PWM Mode is used
69 - The TIM2 Update event is used as Trigger Output
70
71 2/TIM3 is slave for TIM2 and Master for TIM4,
72 - PWM Mode is used
73 - The ITR1(TIM2) is used as input trigger
74 - Gated mode is used, so start and stop of slave counter
75 are controlled by the Master trigger output signal(TIM2 update event).
76 - The TIM3 Update event is used as Trigger Output.
77
78 3/TIM4 is slave for TIM3,
79 - PWM Mode is used
80 - The ITR2(TIM3) is used as input trigger
81 - Gated mode is used, so start and stop of slave counter
82 are controlled by the Master trigger output signal(TIM3 update event).
83
84 * For Low-density, Medium-density, High-density and Connectivity line devices:
85 The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz.
86
87 The Master Timer TIM2 is running at TIM2 frequency :
88 TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 281.250 KHz
89 and the duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%.
90
91 The TIM3 is running:
92 - At (TIM2 frequency)/ (TIM3 period + 1) = 70.312 KHz and a duty cycle
93 equal to TIM3_CCR1/(TIM3_ARR + 1) = 25%
94
95 The TIM4 is running:
96 - At (TIM3 frequency)/ (TIM4 period + 1) = 17.578 KHz and a duty cycle
97 equal to TIM4_CCR1/(TIM4_ARR + 1) = 25%
98
99 * For Low-Density Value line,Medium-Density and High-Density Value line devices:
100 The TIMxCLK is fixed to 24 MHz, the TIM2 counter clock is 24 MHz.
101 So TIM2 frequency = 93.750 KHz,
102 TIM3 is running at 23.437 KHz,
103 and TIM4 is running at 5.85 KHz
104 -------------------------------------------------------------------- */
105
106 /* Time base configuration */
107 TIM_TimeBaseStructure.TIM_Period = 255;
108 TIM_TimeBaseStructure.TIM_Prescaler = 0;
109 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
110 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
111
112 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
113
114 TIM_TimeBaseStructure.TIM_Period = 3;
115 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
116
117 TIM_TimeBaseStructure.TIM_Period = 3;
118 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
119
120 /* Master Configuration in PWM1 Mode */
121 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
122 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
123 TIM_OCInitStructure.TIM_Pulse = 64;
124 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
125
126 TIM_OC1Init(TIM2, &TIM_OCInitStructure);
127
128 /* Select the Master Slave Mode */
129 TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable);
130
131 /* Master Mode selection */
132 TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update);
133
134 /* Slaves Configuration: PWM1 Mode */
135 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
136 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
137 TIM_OCInitStructure.TIM_Pulse = 1;
138
139 TIM_OC1Init(TIM3, &TIM_OCInitStructure);
140
141 TIM_OC1Init(TIM4, &TIM_OCInitStructure);
142
143 /* Slave Mode selection: TIM3 */
144 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);
145 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1);
146
147 /* Select the Master Slave Mode */
148 TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable);
149
150 /* Master Mode selection: TIM3 */
151 TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update);
152
153 /* Slave Mode selection: TIM4 */
154 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
155 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR2);
156
157 /* TIM enable counter */
158 TIM_Cmd(TIM3, ENABLE);
159 TIM_Cmd(TIM2, ENABLE);
160 TIM_Cmd(TIM4, ENABLE);
161
162 while (1)
163 {
164 }
165 }
166
167 /**
168 * @brief Configures the different system clocks.
169 * @param None
170 * @retval None
171 */
172 void RCC_Configuration(void)
173 {
174 /* TIM2, TIM3 and TIM4 clock enable */
175 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 |
176 RCC_APB1Periph_TIM4, ENABLE);
177
178 /* GPIOA, GPIOB, GPIOC and AFIO clocks enable */
179 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
180 RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
181 }
182
183 /**
184 * @brief Configure the GPIOD Pins.
185 * @param None
186 * @retval None
187 */
188 void GPIO_Configuration(void)
189 {
190 GPIO_InitTypeDef GPIO_InitStructure;
191
192 #ifdef STM32F10X_CL
193 /*GPIOB Configuration: PC6(TIM3 CH1) as alternate function push-pull */
194 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 ;
195 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
196 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
197
198 GPIO_Init(GPIOC, &GPIO_InitStructure);
199
200 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE);
201
202 #else
203 /* GPIOA Configuration: PA6(TIM3 CH1) as alternate function push-pull */
204 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
205 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
206 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
207
208 GPIO_Init(GPIOA, &GPIO_InitStructure);
209 #endif
210 /* GPIOA Configuration: PA0(TIM2 CH1) as alternate function push-pull */
211 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
212 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
213 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
214
215 GPIO_Init(GPIOA, &GPIO_InitStructure);
216
217 /* GPIOB Configuration: PB6(TIM4 CH1) as alternate function push-pull */
218 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
219
220 GPIO_Init(GPIOB, &GPIO_InitStructure);
221 }
222
223 #ifdef USE_FULL_ASSERT
224
225 /**
226 * @brief Reports the name of the source file and the source line number
227 * where the assert_param error has occurred.
228 * @param file: pointer to the source file name
229 * @param line: assert_param error line source number
230 * @retval None
231 */
232 void assert_failed(uint8_t* file, uint32_t line)
233 {
234 /* User can add his own implementation to report the file name and line number,
235 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
236
237 while (1)
238 {}
239 }
240
241 #endif
242
243 /**
244 * @}
245 */
246
247 /**
248 * @}
249 */
250
251 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/