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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/6Steps/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file TIM/6Steps/main.c | |
4 * @author MCD Application Team | |
5 * @version V3.5.0 | |
6 * @date 08-April-2011 | |
7 * @brief Main program body | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
17 * | |
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> | |
19 ****************************************************************************** | |
20 */ | |
21 | |
22 /* Includes ------------------------------------------------------------------*/ | |
23 #include "stm32f10x.h" | |
24 | |
25 /** @addtogroup STM32F10x_StdPeriph_Examples | |
26 * @{ | |
27 */ | |
28 | |
29 /** @addtogroup TIM_6Steps | |
30 * @{ | |
31 */ | |
32 | |
33 /* Private typedef -----------------------------------------------------------*/ | |
34 /* Private define ------------------------------------------------------------*/ | |
35 /* Private macro -------------------------------------------------------------*/ | |
36 /* Private variables ---------------------------------------------------------*/ | |
37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; | |
38 TIM_OCInitTypeDef TIM_OCInitStructure; | |
39 TIM_BDTRInitTypeDef TIM_BDTRInitStructure; | |
40 uint16_t CCR1_Val = 32767; | |
41 uint16_t CCR2_Val = 24575; | |
42 uint16_t CCR3_Val = 16383; | |
43 uint16_t CCR4_Val = 8191; | |
44 | |
45 /* Private function prototypes -----------------------------------------------*/ | |
46 void RCC_Configuration(void); | |
47 void GPIO_Configuration(void); | |
48 void SysTick_Configuration(void); | |
49 void NVIC_Configuration(void); | |
50 | |
51 /* Private functions ---------------------------------------------------------*/ | |
52 | |
53 /** | |
54 * @brief Main program | |
55 * @param None | |
56 * @retval None | |
57 */ | |
58 int main(void) | |
59 { | |
60 /*!< At this stage the microcontroller clock setting is already configured, | |
61 this is done through SystemInit() function which is called from startup | |
62 file (startup_stm32f10x_xx.s) before to branch to application main. | |
63 To reconfigure the default setting of SystemInit() function, refer to | |
64 system_stm32f10x.c file | |
65 */ | |
66 | |
67 /* System Clocks Configuration */ | |
68 RCC_Configuration(); | |
69 | |
70 /* NVIC Configuration */ | |
71 NVIC_Configuration(); | |
72 | |
73 /* GPIO Configuration */ | |
74 GPIO_Configuration(); | |
75 | |
76 /* SysTick Configuration */ | |
77 SysTick_Configuration(); | |
78 | |
79 /*----------------------------------------------------------------------------- | |
80 The STM32F10x TIM1 peripheral offers the possibility to program in advance the | |
81 configuration for the next TIM1 outputs behaviour (step) and change the configuration | |
82 of all the channels at the same time. This operation is possible when the COM | |
83 (commutation) event is used. | |
84 The COM event can be generated by software by setting the COM bit in the TIM1_EGR | |
85 register or by hardware (on TRC rising edge). | |
86 In this example, a software COM event is generated each 100 ms: using the Systick | |
87 interrupt. | |
88 The TIM1 is configured in Timing Mode, each time a COM event occurs, | |
89 a new TIM1 configuration will be set in advance. | |
90 The following Table describes the TIM1 Channels states: | |
91 ----------------------------------------------- | |
92 | Step1 | Step2 | Step3 | Step4 | Step5 | Step6 | | |
93 ---------------------------------------------------------- | |
94 |Channel1 | 1 | 0 | 0 | 0 | 0 | 1 | | |
95 ---------------------------------------------------------- | |
96 |Channel1N | 0 | 0 | 1 | 1 | 0 | 0 | | |
97 ---------------------------------------------------------- | |
98 |Channel2 | 0 | 0 | 0 | 1 | 1 | 0 | | |
99 ---------------------------------------------------------- | |
100 |Channel2N | 1 | 1 | 0 | 0 | 0 | 0 | | |
101 ---------------------------------------------------------- | |
102 |Channel3 | 0 | 1 | 1 | 0 | 0 | 0 | | |
103 ---------------------------------------------------------- | |
104 |Channel3N | 0 | 0 | 0 | 0 | 1 | 1 | | |
105 ---------------------------------------------------------- | |
106 -----------------------------------------------------------------------------*/ | |
107 | |
108 /* Time Base configuration */ | |
109 TIM_TimeBaseStructure.TIM_Prescaler = 0; | |
110 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; | |
111 TIM_TimeBaseStructure.TIM_Period = 4095; | |
112 TIM_TimeBaseStructure.TIM_ClockDivision = 0; | |
113 TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; | |
114 | |
115 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); | |
116 | |
117 /* Channel 1, 2,3 and 4 Configuration in PWM mode */ | |
118 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing; | |
119 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
120 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; | |
121 TIM_OCInitStructure.TIM_Pulse = 2047; | |
122 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; | |
123 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High; | |
124 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set; | |
125 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set; | |
126 | |
127 TIM_OC1Init(TIM1, &TIM_OCInitStructure); | |
128 | |
129 TIM_OCInitStructure.TIM_Pulse = 1023; | |
130 TIM_OC2Init(TIM1, &TIM_OCInitStructure); | |
131 | |
132 TIM_OCInitStructure.TIM_Pulse = 511; | |
133 TIM_OC3Init(TIM1, &TIM_OCInitStructure); | |
134 | |
135 /* Automatic Output enable, Break, dead time and lock configuration*/ | |
136 TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; | |
137 TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable; | |
138 TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF; | |
139 TIM_BDTRInitStructure.TIM_DeadTime = 1; | |
140 TIM_BDTRInitStructure.TIM_Break = TIM_Break_Enable; | |
141 TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High; | |
142 TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable; | |
143 | |
144 TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure); | |
145 | |
146 TIM_CCPreloadControl(TIM1, ENABLE); | |
147 | |
148 TIM_ITConfig(TIM1, TIM_IT_COM, ENABLE); | |
149 | |
150 /* TIM1 counter enable */ | |
151 TIM_Cmd(TIM1, ENABLE); | |
152 | |
153 /* Main Output Enable */ | |
154 TIM_CtrlPWMOutputs(TIM1, ENABLE); | |
155 | |
156 while (1) | |
157 {} | |
158 } | |
159 | |
160 /** | |
161 * @brief Configures the different system clocks. | |
162 * @param None | |
163 * @retval None | |
164 */ | |
165 void RCC_Configuration(void) | |
166 { | |
167 /* TIM1, GPIOA, GPIOB, GPIOE and AFIO clocks enable */ | |
168 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOE| | |
169 RCC_APB2Periph_GPIOB |RCC_APB2Periph_AFIO, ENABLE); | |
170 } | |
171 | |
172 /** | |
173 * @brief Configure the TIM1 Pins. | |
174 * @param None | |
175 * @retval None | |
176 */ | |
177 void GPIO_Configuration(void) | |
178 { | |
179 GPIO_InitTypeDef GPIO_InitStructure; | |
180 | |
181 #ifdef STM32F10X_CL | |
182 /* GPIOE Configuration: Channel 1/1N, 2/2N, 3/3N as alternate function push-pull */ | |
183 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9|GPIO_Pin_11|GPIO_Pin_13| | |
184 GPIO_Pin_8|GPIO_Pin_10|GPIO_Pin_12; | |
185 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
186 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
187 | |
188 GPIO_Init(GPIOE, &GPIO_InitStructure); | |
189 | |
190 /* GPIOE Configuration: BKIN pin */ | |
191 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; | |
192 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; | |
193 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
194 | |
195 GPIO_Init(GPIOE, &GPIO_InitStructure); | |
196 | |
197 /* TIM1 Full remapping pins */ | |
198 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE); | |
199 | |
200 #else | |
201 /* GPIOA Configuration: Channel 1, 2 and 3 as alternate function push-pull */ | |
202 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10; | |
203 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
204 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
205 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
206 | |
207 /* GPIOB Configuration: Channel 1N, 2N and 3N as alternate function push-pull */ | |
208 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; | |
209 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
210 | |
211 /* GPIOB Configuration: BKIN pin */ | |
212 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; | |
213 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; | |
214 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
215 #endif | |
216 } | |
217 | |
218 /** | |
219 * @brief Configures the SysTick. | |
220 * @param None | |
221 * @retval None | |
222 */ | |
223 void SysTick_Configuration(void) | |
224 { | |
225 /* Setup SysTick Timer for 100 msec interrupts */ | |
226 if (SysTick_Config((SystemCoreClock) / 10)) | |
227 { | |
228 /* Capture error */ | |
229 while (1); | |
230 } | |
231 | |
232 NVIC_SetPriority(SysTick_IRQn, 0x0); | |
233 } | |
234 | |
235 /** | |
236 * @brief Configures the nested vectored interrupt controller. | |
237 * @param None | |
238 * @retval None | |
239 */ | |
240 void NVIC_Configuration(void) | |
241 { | |
242 NVIC_InitTypeDef NVIC_InitStructure; | |
243 | |
244 /* Enable the TIM1 Interrupt */ | |
245 #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) | |
246 NVIC_InitStructure.NVIC_IRQChannel = TIM1_TRG_COM_TIM17_IRQn; | |
247 #else | |
248 NVIC_InitStructure.NVIC_IRQChannel = TIM1_TRG_COM_IRQn; | |
249 #endif | |
250 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; | |
251 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; | |
252 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; | |
253 NVIC_Init(&NVIC_InitStructure); | |
254 | |
255 } | |
256 | |
257 #ifdef USE_FULL_ASSERT | |
258 | |
259 /** | |
260 * @brief Reports the name of the source file and the source line number | |
261 * where the assert_param error has occurred. | |
262 * @param file: pointer to the source file name | |
263 * @param line: assert_param error line source number | |
264 * @retval None | |
265 */ | |
266 void assert_failed(uint8_t* file, uint32_t line) | |
267 { | |
268 /* User can add his own implementation to report the file name and line number, | |
269 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
270 | |
271 while (1) | |
272 {} | |
273 } | |
274 | |
275 #endif | |
276 /** | |
277 * @} | |
278 */ | |
279 | |
280 /** | |
281 * @} | |
282 */ | |
283 | |
284 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |