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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/Cascade_Synchro/main.c @ 89:fc21fb5b171b default tip
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Fri, 13 Mar 2015 11:39:59 +1030 |
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1 /** |
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2 ****************************************************************************** |
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3 * @file TIM/Cascade_Synchro/main.c |
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4 * @author MCD Application Team |
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5 * @version V3.5.0 |
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6 * @date 08-April-2011 |
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7 * @brief Main program body |
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8 ****************************************************************************** |
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9 * @attention |
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10 * |
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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17 * |
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18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
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19 ****************************************************************************** |
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20 */ |
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21 |
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22 /* Includes ------------------------------------------------------------------*/ |
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23 #include "stm32f10x.h" |
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24 |
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25 /** @addtogroup STM32F10x_StdPeriph_Examples |
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26 * @{ |
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27 */ |
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28 |
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29 /** @addtogroup TIM_Cascade_Synchro |
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30 * @{ |
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31 */ |
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32 |
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33 /* Private typedef -----------------------------------------------------------*/ |
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34 /* Private define ------------------------------------------------------------*/ |
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35 /* Private macro -------------------------------------------------------------*/ |
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36 /* Private variables ---------------------------------------------------------*/ |
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37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
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38 TIM_OCInitTypeDef TIM_OCInitStructure; |
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39 |
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40 /* Private function prototypes -----------------------------------------------*/ |
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41 void RCC_Configuration(void); |
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42 void GPIO_Configuration(void); |
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43 |
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44 /* Private functions ---------------------------------------------------------*/ |
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45 |
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46 /** |
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47 * @brief Main program |
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48 * @param None |
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49 * @retval None |
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50 */ |
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51 int main(void) |
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52 { |
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53 /*!< At this stage the microcontroller clock setting is already configured, |
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54 this is done through SystemInit() function which is called from startup |
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55 file (startup_stm32f10x_xx.s) before to branch to application main. |
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56 To reconfigure the default setting of SystemInit() function, refer to |
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57 system_stm32f10x.c file |
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58 */ |
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59 |
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60 /* System Clocks Configuration */ |
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61 RCC_Configuration(); |
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62 |
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63 /* GPIO Configuration */ |
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64 GPIO_Configuration(); |
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65 |
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66 /* Timers synchronisation in cascade mode ---------------------------- |
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67 1/TIM2 is configured as Master Timer: |
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68 - PWM Mode is used |
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69 - The TIM2 Update event is used as Trigger Output |
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70 |
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71 2/TIM3 is slave for TIM2 and Master for TIM4, |
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72 - PWM Mode is used |
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73 - The ITR1(TIM2) is used as input trigger |
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74 - Gated mode is used, so start and stop of slave counter |
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75 are controlled by the Master trigger output signal(TIM2 update event). |
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76 - The TIM3 Update event is used as Trigger Output. |
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77 |
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78 3/TIM4 is slave for TIM3, |
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79 - PWM Mode is used |
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80 - The ITR2(TIM3) is used as input trigger |
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81 - Gated mode is used, so start and stop of slave counter |
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82 are controlled by the Master trigger output signal(TIM3 update event). |
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83 |
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84 * For Low-density, Medium-density, High-density and Connectivity line devices: |
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85 The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz. |
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86 |
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87 The Master Timer TIM2 is running at TIM2 frequency : |
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88 TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 281.250 KHz |
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89 and the duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%. |
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90 |
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91 The TIM3 is running: |
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92 - At (TIM2 frequency)/ (TIM3 period + 1) = 70.312 KHz and a duty cycle |
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93 equal to TIM3_CCR1/(TIM3_ARR + 1) = 25% |
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94 |
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95 The TIM4 is running: |
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96 - At (TIM3 frequency)/ (TIM4 period + 1) = 17.578 KHz and a duty cycle |
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97 equal to TIM4_CCR1/(TIM4_ARR + 1) = 25% |
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98 |
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99 * For Low-Density Value line,Medium-Density and High-Density Value line devices: |
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100 The TIMxCLK is fixed to 24 MHz, the TIM2 counter clock is 24 MHz. |
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101 So TIM2 frequency = 93.750 KHz, |
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102 TIM3 is running at 23.437 KHz, |
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103 and TIM4 is running at 5.85 KHz |
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104 -------------------------------------------------------------------- */ |
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105 |
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106 /* Time base configuration */ |
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107 TIM_TimeBaseStructure.TIM_Period = 255; |
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108 TIM_TimeBaseStructure.TIM_Prescaler = 0; |
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109 TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
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110 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
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111 |
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112 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); |
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113 |
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114 TIM_TimeBaseStructure.TIM_Period = 3; |
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115 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); |
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116 |
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117 TIM_TimeBaseStructure.TIM_Period = 3; |
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118 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); |
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119 |
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120 /* Master Configuration in PWM1 Mode */ |
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121 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; |
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122 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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123 TIM_OCInitStructure.TIM_Pulse = 64; |
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124 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; |
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125 |
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126 TIM_OC1Init(TIM2, &TIM_OCInitStructure); |
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127 |
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128 /* Select the Master Slave Mode */ |
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129 TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); |
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130 |
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131 /* Master Mode selection */ |
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132 TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); |
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133 |
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134 /* Slaves Configuration: PWM1 Mode */ |
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135 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; |
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136 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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137 TIM_OCInitStructure.TIM_Pulse = 1; |
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138 |
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139 TIM_OC1Init(TIM3, &TIM_OCInitStructure); |
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140 |
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141 TIM_OC1Init(TIM4, &TIM_OCInitStructure); |
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142 |
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143 /* Slave Mode selection: TIM3 */ |
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144 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); |
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145 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1); |
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146 |
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147 /* Select the Master Slave Mode */ |
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148 TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable); |
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149 |
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150 /* Master Mode selection: TIM3 */ |
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151 TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update); |
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152 |
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153 /* Slave Mode selection: TIM4 */ |
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154 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated); |
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155 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR2); |
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156 |
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157 /* TIM enable counter */ |
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158 TIM_Cmd(TIM3, ENABLE); |
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159 TIM_Cmd(TIM2, ENABLE); |
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160 TIM_Cmd(TIM4, ENABLE); |
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161 |
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162 while (1) |
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163 { |
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164 } |
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165 } |
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166 |
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167 /** |
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168 * @brief Configures the different system clocks. |
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169 * @param None |
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170 * @retval None |
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171 */ |
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172 void RCC_Configuration(void) |
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173 { |
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174 /* TIM2, TIM3 and TIM4 clock enable */ |
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175 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | |
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176 RCC_APB1Periph_TIM4, ENABLE); |
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177 |
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178 /* GPIOA, GPIOB, GPIOC and AFIO clocks enable */ |
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179 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | |
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180 RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); |
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181 } |
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182 |
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183 /** |
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184 * @brief Configure the GPIOD Pins. |
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185 * @param None |
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186 * @retval None |
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187 */ |
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188 void GPIO_Configuration(void) |
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189 { |
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190 GPIO_InitTypeDef GPIO_InitStructure; |
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191 |
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192 #ifdef STM32F10X_CL |
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193 /*GPIOB Configuration: PC6(TIM3 CH1) as alternate function push-pull */ |
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194 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 ; |
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195 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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196 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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197 |
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198 GPIO_Init(GPIOC, &GPIO_InitStructure); |
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199 |
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200 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE); |
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201 |
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202 #else |
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203 /* GPIOA Configuration: PA6(TIM3 CH1) as alternate function push-pull */ |
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204 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; |
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205 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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206 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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207 |
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208 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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209 #endif |
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210 /* GPIOA Configuration: PA0(TIM2 CH1) as alternate function push-pull */ |
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211 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; |
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212 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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213 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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214 |
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215 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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216 |
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217 /* GPIOB Configuration: PB6(TIM4 CH1) as alternate function push-pull */ |
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218 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; |
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219 |
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220 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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221 } |
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222 |
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223 #ifdef USE_FULL_ASSERT |
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224 |
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225 /** |
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226 * @brief Reports the name of the source file and the source line number |
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227 * where the assert_param error has occurred. |
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228 * @param file: pointer to the source file name |
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229 * @param line: assert_param error line source number |
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230 * @retval None |
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231 */ |
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232 void assert_failed(uint8_t* file, uint32_t line) |
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233 { |
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234 /* User can add his own implementation to report the file name and line number, |
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235 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
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236 |
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237 while (1) |
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238 {} |
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239 } |
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240 |
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241 #endif |
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242 |
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243 /** |
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244 * @} |
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245 */ |
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246 |
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247 /** |
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248 * @} |
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249 */ |
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250 |
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251 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |