Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate hw.c @ 89:fc21fb5b171b default tip
Make error message more useful
author | Daniel O'Connor <darius@dons.net.au> |
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date | Fri, 13 Mar 2015 11:39:59 +1030 |
parents | 5fc6a25f40ef |
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rev | line source |
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1 #include <stdint.h> |
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2 #include <stdio.h> |
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3 #include "stm32f10x.h" |
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5 #include "1wire.h" | |
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6 #include "lcd.h" |
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7 #include "rtc.h" |
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18 | 9 #define I2C_TIMEOUT 10000 |
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10 static void hw_port_cfg(void); |
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11 |
13 | 12 void |
13 hw_init(void) { | |
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14 hw_port_cfg(); |
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15 #if 0 |
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16 lcd_init(); |
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17 lcd_setpwm(1000); |
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18 #endif |
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19 } |
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20 |
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21 static void |
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22 hw_port_cfg(void) { |
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23 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
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24 FSMC_NORSRAMTimingInitTypeDef p; |
18 | 25 GPIO_InitTypeDef GPIO_InitStructure; |
26 I2C_InitTypeDef I2C_InitStructure; | |
27 SPI_InitTypeDef SPI_InitStructure; | |
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28 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
18 | 29 USART_InitTypeDef USART_InitStructure; |
30 | |
31 /* Enable clocks */ | |
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32 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP | |
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33 RCC_APB1Periph_TIM4 | RCC_APB1Periph_I2C1, |
18 | 34 ENABLE); |
35 | |
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36 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA | |
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37 RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOB | |
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38 RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | |
18 | 39 RCC_APB2Periph_GPIOE | RCC_APB2Periph_SPI1, ENABLE); |
40 | |
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41 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC | RCC_AHBPeriph_CRC | |
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42 RCC_AHBPeriph_SDIO | RCC_AHBPeriph_DMA2, ENABLE); |
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43 |
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44 |
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45 /* Allow access to BKP Domain */ |
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46 PWR_BackupAccessCmd(ENABLE); |
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47 |
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48 /* Reset Backup Domain |
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49 * |
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50 * This resets the RTC etc back to 0 so probably only useful under user command |
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51 BKP_DeInit(); |
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52 */ |
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53 |
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54 /* Enable Low Speed External clock */ |
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55 RCC_LSEConfig(RCC_LSE_ON); |
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56 |
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57 /* Wait till LSE is ready */ |
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58 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) |
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59 ; |
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60 |
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61 /* Select LSE as RTC Clock Source */ |
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62 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); |
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63 |
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64 /* Enable RTC Clock */ |
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65 RCC_RTCCLKCmd(ENABLE); |
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66 |
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67 /* Wait for RTC registers synchronization */ |
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68 RTC_WaitForSynchro(); |
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69 |
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70 /* Wait until last write operation on RTC registers has finished */ |
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71 RTC_WaitForLastTask(); |
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72 |
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73 /* Wait until last write operation on RTC registers has finished */ |
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74 RTC_WaitForLastTask(); |
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75 |
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76 /* Set RTC prescaler: set RTC period to 1sec */ |
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77 RTC_SetPrescaler(RTC_PRESCALE); |
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78 |
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79 /* Wait until last write operation on RTC registers has finished */ |
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80 RTC_WaitForLastTask(); |
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81 |
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82 /* Port configuration */ |
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83 /* Configure USART1 TX (PA.09) as alternate function push-pull */ |
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84 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; |
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85 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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86 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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87 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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88 |
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89 /* Configure USART1 RX (PA.10) as input floating */ |
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90 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; |
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91 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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92 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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93 |
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94 /* Configure PB5 as output push-pull for LED */ |
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95 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; |
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96 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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97 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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98 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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99 |
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100 /* Configure PB15 as input pull-up push-pull for push button */ |
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101 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; |
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102 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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103 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; |
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104 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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105 |
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106 /* USART configuration */ |
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107 /* USART1 - 115200 8n1, no flow control TX & RX enabled */ |
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108 USART_InitStructure.USART_BaudRate = 38400; |
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109 USART_InitStructure.USART_WordLength = USART_WordLength_8b; |
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110 USART_InitStructure.USART_StopBits = USART_StopBits_1; |
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111 USART_InitStructure.USART_Parity = USART_Parity_No; |
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112 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; |
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113 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; |
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114 USART_Init(USART1, &USART_InitStructure); |
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115 |
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116 /* Enable interrupts on receive data */ |
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117 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); |
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118 |
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119 /* Enable USART */ |
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120 USART_Cmd(USART1, ENABLE); |
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121 |
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122 /* Enable FSMC clock */ |
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123 |
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124 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode. |
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125 * |
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126 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14), |
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127 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1) |
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128 */ |
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129 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 | |
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130 GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | |
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131 GPIO_Pin_14 | GPIO_Pin_15); |
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132 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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133 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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134 GPIO_Init(GPIOD, &GPIO_InitStructure); |
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135 |
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136 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10), |
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137 * PE14(D11), PE15(D12) |
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138 */ |
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139 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | |
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140 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | |
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141 GPIO_Pin_15); |
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142 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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143 |
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144 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */ |
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145 |
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146 /* Enable timer function |
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147 * Note source clock is SYSCLK / 2 = 36MHz |
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148 */ |
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149 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; |
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150 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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151 // XXX: PWM not working |
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152 //GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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153 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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154 GPIO_Init(GPIOD, &GPIO_InitStructure); |
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155 GPIO_SetBits(GPIOD, GPIO_Pin_13); |
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156 |
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157 /* Remap TIM4_CH2 to PD13 */ |
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158 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE); |
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159 |
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160 /* Reset TIM4 */ |
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161 TIM_DeInit(TIM4); |
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162 |
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163 /* Time Base configuration */ |
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164 TIM_TimeBaseStructure.TIM_Period = 999; |
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165 TIM_TimeBaseStructure.TIM_Prescaler = 0; |
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166 TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
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167 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down; |
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168 |
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169 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); |
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170 |
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171 /* Enable timer */ |
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172 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable); |
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173 TIM_ARRPreloadConfig(TIM4, ENABLE); |
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174 TIM_Cmd(TIM4, ENABLE); |
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175 |
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176 /* Configure reset pin (PE1) as GPIO out PP */ |
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177 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; |
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178 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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179 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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180 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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181 |
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182 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */ |
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183 /* Timing configuration */ |
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184 p.FSMC_AddressSetupTime = 5; |
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185 p.FSMC_AddressHoldTime = 5; |
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186 p.FSMC_DataSetupTime = 5; |
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187 p.FSMC_BusTurnAroundDuration = 0; |
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188 p.FSMC_CLKDivision = 0; |
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189 p.FSMC_DataLatency = 0; |
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190 p.FSMC_AccessMode = FSMC_AccessMode_A; |
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191 |
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192 /* FSMC_Bank1_NORSRAM1 configured as follows: |
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193 - Data/Address MUX = Disable |
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194 - Memory Type = SRAM |
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195 - Data Width = 16bit |
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196 - Write Operation = Enable |
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197 - Extended Mode = Disable |
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198 - Asynchronous Wait = Disable */ |
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199 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; |
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200 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
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201 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
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202 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
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203 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
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204 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
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205 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
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206 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
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207 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
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208 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
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209 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
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210 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
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211 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
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212 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
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213 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
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214 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
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215 |
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216 /* Enable FSMC_Bank1_NORSRAM1 */ |
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217 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); |
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218 |
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219 /* Configure touch screen controller |
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220 * |
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221 * Connected to SPI1 which is shared with the AT45DB161D. |
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222 * |
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223 * The touch screen is selected with PB7. |
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224 * The flash chip is selected with PA4. |
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225 */ |
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226 |
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227 /* Configure MOSI, MISO and SCLK as alternate function PP */ |
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228 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7; |
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229 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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230 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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231 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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232 |
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233 /* Configure flash chip select pin (PA4) as GPIO out PP */ |
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234 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; |
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235 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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237 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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238 |
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239 /* Configure touch chip select pin (PB7) as GPIO out PP */ |
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240 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; |
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241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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242 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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243 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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244 |
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245 /* De-select touch & flash */ |
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246 GPIO_SetBits(GPIOA, GPIO_Pin_4); |
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247 GPIO_SetBits(GPIOB, GPIO_Pin_7); |
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248 |
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249 /* SPI1 Config */ |
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250 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; |
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251 SPI_InitStructure.SPI_Mode = SPI_Mode_Master; |
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252 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; |
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253 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; |
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254 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; |
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255 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; |
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256 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; |
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257 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; |
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258 SPI_InitStructure.SPI_CRCPolynomial = 7; |
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259 SPI_Init(SPI1, &SPI_InitStructure); |
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260 |
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261 /* SPI1 enable */ |
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262 SPI_Cmd(SPI1, ENABLE); |
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263 |
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264 /* Setup GPIO for delay test (2) 1-wire (3) & temp ctrl (4/5) |
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265 * PE2 -> 3 (on header) |
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266 * PE3 -> 4 |
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267 * PE4 -> 5 |
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268 * PE5 -> 6 |
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269 */ |
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270 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5; |
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271 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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272 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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273 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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274 |
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275 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9; |
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276 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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277 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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278 GPIO_Init(GPIOC, &GPIO_InitStructure); |
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279 |
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280 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12; |
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281 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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282 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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283 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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284 |
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285 /* Setup 1-wire bus */ |
13 | 286 OWInit(); |
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287 |
18 | 288 /* Setup I2C bus */ |
289 | |
290 /* Configure SCL/SDA pins */ | |
291 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9; | |
292 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
293 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; | |
294 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
295 | |
296 /* Reset I2C1 */ | |
297 I2C_DeInit(I2C1); | |
298 | |
299 /* Setup I2C1 */ | |
300 I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; | |
301 I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; | |
302 I2C_InitStructure.I2C_OwnAddress1 = 0x00; | |
303 I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; | |
304 I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; | |
305 I2C_InitStructure.I2C_ClockSpeed = 100000; | |
306 I2C_Init(I2C1, &I2C_InitStructure); | |
307 | |
308 /* Start I2C controller */ | |
309 I2C_Cmd(I2C1, ENABLE); | |
310 | |
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311 /* Enable debug block for cycle counter |
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312 * From http://forums.arm.com/index.php?/topic/13949-cycle-count-in-cortex-m3/ |
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313 * via http://stackoverflow.com/questions/11530593/cycle-counter-on-arm-cortex-m4-or-m3/11530829#11530829 |
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314 */ |
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315 volatile uint32_t *DWT_CONTROL = (uint32_t *)0xe0001000; |
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316 volatile uint32_t *SCB_DEMCR = (uint32_t *)0xe000edfc; |
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317 |
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318 *SCB_DEMCR = *SCB_DEMCR | 0x01000000; |
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319 *DWT_CONTROL = *DWT_CONTROL | 1 ; // enable the counter |
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320 |
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321 /* Setup SDIO |
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322 * See SD_LowLevelInit from libs/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c |
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323 */ |
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324 |
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325 /* Configure SDIO pins for AF |
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326 PC8 -> SD0 |
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327 PC9 -> SD1 |
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328 PC10 -> SD2 |
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329 PC11 -> SD3 |
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330 PC12 -> SCK |
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331 */ |
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332 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12; |
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333 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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334 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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335 GPIO_Init(GPIOC, &GPIO_InitStructure); |
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336 |
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337 /* Configure PD2 -> CMD SDIO pin for AF */ |
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338 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; |
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339 GPIO_Init(GPIOD, &GPIO_InitStructure); |
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340 } |