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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/CRC/readme.txt @ 0:c59513fd84fb
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** |
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2 @page SPI_CRC SPI CRC example |
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3 |
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4 @verbatim |
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* |
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6 * @file SPI/CRC/readme.txt |
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7 * @author MCD Application Team |
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8 * @version V3.5.0 |
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9 * @date 08-April-2011 |
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10 * @brief Description of the SPI CRC example. |
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11 ****************************************************************************** |
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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18 ****************************************************************************** |
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19 @endverbatim |
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20 |
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21 @par Example Description |
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22 |
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23 This example provides a description of how to set a communication between two |
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24 SPIs in full-duplex mode and performs a transfer from Master to Slave and |
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25 Slave to Master followed by CRC transmission. |
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26 |
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27 SPI1 is configured as master and SPI2 as slave and both are in full-duplex |
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28 configuration mode with 16bit data size and a 4.5 Mbit/s communication speed |
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29 (for Value line devices the speed is set at 1.5 Mbit/s). |
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30 CRC calculation is enabled for both SPIs. |
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31 |
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32 After enabling both SPIs, the first data from SPI2_Buffer_Tx is transmitted from |
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33 slave followed by the first data from SPI1_Buffer_Tx send by the master. A test |
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34 on RxNE flag is done for both master and slave to check the reception of data on |
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35 their respective data register. The same procedure is done for the remaining data |
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36 to transfer except the last ones. |
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37 |
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38 Last data from SPI1_Buffer_Tx is transmitted followed by enabling CRC transmission |
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39 for SPI1 and the last data from SPI2_Buffer_Tx is transmitted followed by enabling |
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40 CRC transmission for SPI2: user must take care to reduce code on this phase for |
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41 high speed communication. |
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42 |
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43 Last transmitted buffer data and CRC value are then received successively on |
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44 master and slave data registers. The received CRC value are stored on CRC1Value |
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45 and CRC2Value respectively for SPI1 and SPI2. |
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46 |
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47 Once the transfer is completed a comparison is done and TransferStatus1 and |
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48 TransferStatus2 gives the data transfer status for each data transfer direction |
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49 where it is PASSED if transmitted and received data are the same otherwise it |
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50 is FAILED. |
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51 A check of CRC error flag, for the master and the salve, is done after receiving |
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52 CRC data. |
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53 |
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54 @par Directory contents |
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55 |
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56 - SPI/CRC/stm32f10x_conf.h Library Configuration file |
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57 - SPI/CRC/stm32f10x_it.c Interrupt handlers |
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58 - SPI/CRC/stm32f10x_it.h Header for stm32f10x_it.c |
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59 - SPI/CRC/main.c Main program |
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60 - SPI/CRC/system_stm32f10x.c STM32F10x system source file |
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61 |
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62 @par Hardware and Software environment |
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63 |
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64 - This example runs on STM32F10x Connectivity line, High-Density, High-Density |
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65 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density |
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66 and Low-Density Value line Devices. |
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67 |
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68 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density |
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69 Value line), STM32100B-EVAL(STM32F10x Medium-Density Value line), STM3210E-EVAL |
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70 (STM32F10x High-Density) and STM3210B-EVAL (STM32F10x Medium-Density) |
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71 evaluation boards and can be easily tailored to any other supported |
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72 device and development board. |
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73 This example can't be tested with STMicroelectronics STM3210C-EVAL (STM32F10x |
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74 Connectivity Line) evaluation board. |
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75 |
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76 - STM32100E-EVAL Set-up |
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77 - Connect SPI1 SCK (PA.05) pin to SPI2 SCK (PB.13) pin |
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78 - Connect SPI1 MISO (PA.06) pin to SPI2 MISO (PB.14) pin |
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79 - Connect SPI1 MOSI (PA.07) pin to SPI2 MOSI (PB.15) pin |
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80 |
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81 - STM32100B-EVAL Set-up |
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82 - Connect SPI1 SCK (PA.05) pin to SPI2 SCK (PB.13) pin |
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83 - Connect SPI1 MISO (PA.06) pin to SPI2 MISO (PB.14) pin |
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84 - Connect SPI1 MOSI (PA.07) pin to SPI2 MOSI (PB.15) pin |
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85 |
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86 - STM3210E-EVAL Set-up |
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87 - Connect SPI1 SCK (PA.05) pin to SPI2 SCK (PB.13) pin |
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88 - Connect SPI1 MISO (PA.06) pin to SPI2 MISO (PB.14) pin |
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89 - Connect SPI1 MOSI (PA.07) pin to SPI2 MOSI (PB.15) pin |
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90 @note The jumper 14 (USB Disconnect) must be set in position 1<->2 in order |
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91 to not interfer with SPI2 MISO pin PB14. |
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92 |
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93 - STM3210B-EVAL Set-up |
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94 - Connect SPI1 SCK (PA.05) pin to SPI2 SCK (PB.13) pin |
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95 - Connect SPI1 MISO (PA.06) pin to SPI2 MISO (PB.14) pin |
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96 - Connect SPI1 MOSI (PA.07) pin to SPI2 MOSI (PB.15) pin |
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97 |
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98 @par How to use it ? |
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99 |
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100 In order to make the program work, you must do the following : |
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101 - Copy all source files from this example folder to the template folder under |
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102 Project\STM32F10x_StdPeriph_Template |
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103 - Open your preferred toolchain |
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104 - Rebuild all files and load your image into target memory |
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105 - Run the example |
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106 |
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107 @note |
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108 - Low-density Value line devices are STM32F100xx microcontrollers where the |
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109 Flash memory density ranges between 16 and 32 Kbytes. |
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110 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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111 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. |
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112 - Medium-density Value line devices are STM32F100xx microcontrollers where |
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113 the Flash memory density ranges between 64 and 128 Kbytes. |
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114 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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115 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. |
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116 - High-density Value line devices are STM32F100xx microcontrollers where |
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117 the Flash memory density ranges between 256 and 512 Kbytes. |
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118 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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119 the Flash memory density ranges between 256 and 512 Kbytes. |
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120 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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121 the Flash memory density ranges between 512 and 1024 Kbytes. |
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122 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. |
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diff
changeset
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123 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
124 * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
125 */ |