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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c @ 0:c59513fd84fb

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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
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2 ******************************************************************************
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3 * @file stm32f10x_wwdg.c
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4 * @author MCD Application Team
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5 * @version V3.5.0
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6 * @date 11-March-2011
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7 * @brief This file provides all the WWDG firmware functions.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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17 *
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18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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19 ******************************************************************************
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20 */
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21
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22 /* Includes ------------------------------------------------------------------*/
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23 #include "stm32f10x_wwdg.h"
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24 #include "stm32f10x_rcc.h"
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25
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26 /** @addtogroup STM32F10x_StdPeriph_Driver
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27 * @{
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28 */
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29
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30 /** @defgroup WWDG
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31 * @brief WWDG driver modules
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32 * @{
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33 */
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34
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35 /** @defgroup WWDG_Private_TypesDefinitions
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36 * @{
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37 */
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38
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39 /**
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40 * @}
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41 */
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42
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43 /** @defgroup WWDG_Private_Defines
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44 * @{
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45 */
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46
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47 /* ----------- WWDG registers bit address in the alias region ----------- */
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48 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
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49
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50 /* Alias word address of EWI bit */
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51 #define CFR_OFFSET (WWDG_OFFSET + 0x04)
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52 #define EWI_BitNumber 0x09
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53 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
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54
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55 /* --------------------- WWDG registers bit mask ------------------------ */
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56
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57 /* CR register bit mask */
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58 #define CR_WDGA_Set ((uint32_t)0x00000080)
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59
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60 /* CFR register bit mask */
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61 #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)
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62 #define CFR_W_Mask ((uint32_t)0xFFFFFF80)
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63 #define BIT_Mask ((uint8_t)0x7F)
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64
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65 /**
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66 * @}
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67 */
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68
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69 /** @defgroup WWDG_Private_Macros
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70 * @{
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71 */
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72
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73 /**
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74 * @}
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75 */
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76
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77 /** @defgroup WWDG_Private_Variables
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78 * @{
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79 */
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80
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81 /**
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82 * @}
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83 */
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84
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85 /** @defgroup WWDG_Private_FunctionPrototypes
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86 * @{
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87 */
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88
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89 /**
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90 * @}
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91 */
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92
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93 /** @defgroup WWDG_Private_Functions
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94 * @{
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95 */
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96
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97 /**
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98 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
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99 * @param None
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100 * @retval None
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101 */
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102 void WWDG_DeInit(void)
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103 {
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104 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
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105 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
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106 }
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107
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108 /**
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109 * @brief Sets the WWDG Prescaler.
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110 * @param WWDG_Prescaler: specifies the WWDG Prescaler.
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111 * This parameter can be one of the following values:
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112 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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113 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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114 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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115 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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116 * @retval None
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117 */
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118 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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119 {
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120 uint32_t tmpreg = 0;
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121 /* Check the parameters */
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122 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
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123 /* Clear WDGTB[1:0] bits */
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124 tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
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125 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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126 tmpreg |= WWDG_Prescaler;
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127 /* Store the new value */
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128 WWDG->CFR = tmpreg;
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129 }
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130
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131 /**
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132 * @brief Sets the WWDG window value.
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133 * @param WindowValue: specifies the window value to be compared to the downcounter.
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134 * This parameter value must be lower than 0x80.
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135 * @retval None
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136 */
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137 void WWDG_SetWindowValue(uint8_t WindowValue)
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138 {
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139 __IO uint32_t tmpreg = 0;
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140
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141 /* Check the parameters */
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142 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
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143 /* Clear W[6:0] bits */
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144
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145 tmpreg = WWDG->CFR & CFR_W_Mask;
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146
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147 /* Set W[6:0] bits according to WindowValue value */
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148 tmpreg |= WindowValue & (uint32_t) BIT_Mask;
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149
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150 /* Store the new value */
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151 WWDG->CFR = tmpreg;
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152 }
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153
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154 /**
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155 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
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156 * @param None
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157 * @retval None
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158 */
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159 void WWDG_EnableIT(void)
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160 {
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161 *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
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162 }
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163
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164 /**
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165 * @brief Sets the WWDG counter value.
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166 * @param Counter: specifies the watchdog counter value.
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167 * This parameter must be a number between 0x40 and 0x7F.
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168 * @retval None
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169 */
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170 void WWDG_SetCounter(uint8_t Counter)
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171 {
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172 /* Check the parameters */
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173 assert_param(IS_WWDG_COUNTER(Counter));
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174 /* Write to T[6:0] bits to configure the counter value, no need to do
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175 a read-modify-write; writing a 0 to WDGA bit does nothing */
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176 WWDG->CR = Counter & BIT_Mask;
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177 }
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178
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179 /**
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180 * @brief Enables WWDG and load the counter value.
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181 * @param Counter: specifies the watchdog counter value.
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182 * This parameter must be a number between 0x40 and 0x7F.
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183 * @retval None
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184 */
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185 void WWDG_Enable(uint8_t Counter)
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186 {
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187 /* Check the parameters */
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188 assert_param(IS_WWDG_COUNTER(Counter));
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189 WWDG->CR = CR_WDGA_Set | Counter;
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190 }
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191
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192 /**
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193 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
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194 * @param None
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195 * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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196 */
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197 FlagStatus WWDG_GetFlagStatus(void)
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198 {
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199 return (FlagStatus)(WWDG->SR);
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200 }
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201
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202 /**
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203 * @brief Clears Early Wakeup interrupt flag.
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204 * @param None
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205 * @retval None
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206 */
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207 void WWDG_ClearFlag(void)
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208 {
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209 WWDG->SR = (uint32_t)RESET;
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210 }
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211
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212 /**
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213 * @}
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214 */
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215
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216 /**
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217 * @}
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218 */
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219
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220 /**
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221 * @}
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222 */
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223
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224 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/