stm32temp: flash.c annotate

annotate flash.c @ 26:74efdb21ae5d

Use a 32 bit var to hold address from atoi().

author	Daniel O'Connor <darius@dons.net.au>
date	Sat, 17 Nov 2012 18:03:48 +1030
parents	a9cc07caa801
children	5c9d2e3d6591

rev	line source
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	1 #include <stdio.h>
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	2 #include <stdint.h>
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	3 #include <string.h>
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	4 #include <stdlib.h>
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	5 #include <assert.h>
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7 #include "stm32f10x.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	8 #include "spi.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9 #include "flash.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11 #define FL_SELECT() GPIO_ResetBits(GPIOA, GPIO_Pin_4)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12 #define FL_DESELECT() GPIO_SetBits(GPIOA, GPIO_Pin_4)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	13
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	14 static const char *flstattbl[] = {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	15 "BUSY",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	16 "WEL",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	17 "BP0",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	18 "BP1",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	19 "BP2",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	20 "BP3",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	21 "AAI",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	22 "BPL"
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	23 };
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	24
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	25 #define RW_IDLE 0
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	26 #define RW_RUNNING 1
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	27 #define RW_IDLE 0
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	28
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	29 static int writestate = RW_IDLE;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	30 static int readstate = RW_IDLE;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	31
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	32 void
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	33 flashcmd(char **argv, int argc) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	34 uint8_t status, tmp;
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	35 uint32_t addr;
74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	36
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	37 if (argc == 0) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	38 fputs("No command specified\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	39 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	40 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	41
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	42 if (!strcmp(argv[0], "str")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	43 status = flashreadstatus();
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	44 fputs("Status = ", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	45 for (unsigned int i = 0; i < sizeof(flstattbl) / sizeof(flstattbl[0]); i++)
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	46 if (status & 1 << i) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	47 fputs(flstattbl[i], stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	48 fputs(" ", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	49 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	50 printf("(0x%02x)\r\n", status);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	51 } else if (!strcmp(argv[0], "stw")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	52 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	53 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	54 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	55 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	56 tmp = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	57 flashwritestatus(tmp);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	58 status = flashreadstatus();
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	59 printf("Wrote 0x%02x to status, now 0x%02x\r\n", tmp, status);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	60 } else if (!strcmp(argv[0], "er")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	61 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	62 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	63 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	64 }
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	65 addr = atoi(argv[1]);
74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	66 flash4kerase(addr);
74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	67 printf("Erased 0x%x\r\n", (unsigned int)addr);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	68 } else if (!strcmp(argv[0], "rd")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	69 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	70 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	71 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	72 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	73
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	74 addr = atoi(argv[1]);
74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	75
74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	76 flashstartread(addr);
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	77
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	78 for (int i = 0; i < 16; i++)
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	79 printf("Read 0x%02x from 0x%06x\r\n", flashreadbyte(), (unsigned int)(addr + i));
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	80 flashstopread();
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	81
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	82 fputs("\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	83 } else if (!strcmp(argv[0], "wr")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	84 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	85 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	86 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	87 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	88
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	89 addr = atoi(argv[1]);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	90
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	91 for (int i = 0; i < 16; i += 2) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	92 uint16_t data;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	93 data = ((i + 1) << 8) \| i;
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	94 printf("Writing 0x%04x to 0x%06x\r\n", data, (unsigned int)(addr + i));
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	95
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	96 if (i == 0)
26 74efdb21ae5d Use a 32 bit var to hold address from atoi(). Daniel O'Connor <darius@dons.net.au> parents: 25 diff changeset	97 flashstartwrite(addr, data);
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	98 else
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	99 flashwriteword(data);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	100 }
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	101 flashstopwrite();
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	102 } else if (!strcmp(argv[0], "id")) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	103 printf("Flash ID = 0x%04hx (expect 0xbf41)\r\n", flashreadid());
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	104 } else {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	105 fputs("Unknown sub command\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	106 return;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	107 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	108 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	109
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	110 void
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	111 flash4kerase(uint32_t addr) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	112 flashenablewrite(); /* Enable writing */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	113
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	114 FL_SELECT(); /* Select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	115
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	116 SPI_WriteByte(FL_4KERASE); /* Send command */
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	117 SPI_WriteByte(addr >> 16); /* Send address */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	118 SPI_WriteByte(addr >> 8);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	119 SPI_WriteByte(addr);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	120
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	121 FL_DESELECT();
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	122
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	123 flashwait();
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	124 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	125
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	126 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	127 flashwait(void) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	128 uint8_t cnt;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	129
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	130 /* Wait for not BUSY */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	131 for (cnt = 0; (flashreadstatus() & FL_BUSY) != 0; cnt++)
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	132 ;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	133
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	134 //printf("cnt = %d\r\n", cnt);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	135 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	136
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	137 uint16_t
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	138 flashreadid(void) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 uint8_t fac, dev;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	140
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141 FL_SELECT(); /* Select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	142
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	143 SPI_WriteByte(FL_RDID); /* Send command */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	144 SPI_WriteByte(0x00); /* Send address cycles (ID data starts at 0) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	145 SPI_WriteByte(0x00);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	146 SPI_WriteByte(0x00);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	147 fac = SPI_WriteByte(0x00); /* Read ID */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	148 dev = SPI_WriteByte(0x00);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	149
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	150 FL_DESELECT(); /* De-select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	151
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	152 return fac << 8 \| dev;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	153 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	154
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	155 void
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	156 flashenablewrite(void) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	157 FL_SELECT(); /* Select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	158
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	159 SPI_WriteByte(FL_WREN); /* Send command */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	160
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	161 FL_DESELECT(); /* De-select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	162 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	163
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	164 uint8_t
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	165 flashreadstatus(void) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166 uint8_t status;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	167
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	168 FL_SELECT(); /* Select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	169
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	170 SPI_WriteByte(FL_RDSR); /* Send command */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	171 SPI_WriteByte(0x00); /* Send dummy byte for address cycle */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	172 status = SPI_WriteByte(0x00); /* Read status */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	173
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	174 FL_DESELECT(); /* De-select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	175
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	176 return status;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	177 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	178
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	179 void
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	180 flashwritestatus(uint8_t status) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	181 /* Enable status write */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	182 FL_SELECT(); /* Select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	183 SPI_WriteByte(FL_EWSR); /* Send command */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	184 SPI_WriteByte(0x00); /* Send data byte */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	185 FL_DESELECT();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	186
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	187 /* Actually write status */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	188 FL_SELECT(); /* Re-select device for new command */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	189 SPI_WriteByte(FL_WRSR); /* Send command */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	190 SPI_WriteByte(status); /* Send data byte */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	191 FL_DESELECT(); /* De-select device */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	192 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	193
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	194 uint8_t
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	195 flashread(uint32_t addr) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	196 uint8_t data;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	197
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	198 FL_SELECT(); /* Select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	199
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	200 SPI_WriteByte(FL_READ); /* Send command */
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	201 SPI_WriteByte(addr >> 16); /* Send address */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	202 SPI_WriteByte(addr >> 8);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	203 SPI_WriteByte(addr);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	204 data = SPI_WriteByte(0x00); /* Read data */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	205
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	206 FL_DESELECT(); /* De-select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	207
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	208 return data;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	209 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	210
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	211 void
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	212 flashwrite(uint32_t addr, uint8_t data) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	213 flashenablewrite(); /* Enable writes */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	214
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	215 FL_SELECT(); /* Select device */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	216
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	217 SPI_WriteByte(FL_BYTEPROG); /* Send command */
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	218 SPI_WriteByte(addr >> 16); /* Send address */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	219 SPI_WriteByte(addr >> 8);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	220 SPI_WriteByte(addr);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	221 SPI_WriteByte(data); /* Write data */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	222
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	223 FL_DESELECT(); /* De-select device */
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	224
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	225 }
25 a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	226
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	227 /*
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	228 * fStream reading looks like so
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	229 *
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	230 */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	231
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	232 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	233 flashstartread(uint32_t addr) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	234 assert(readstate == RW_IDLE);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	235
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	236 FL_SELECT(); /* Select device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	237
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	238 SPI_WriteByte(FL_READ); /* Send command */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	239 SPI_WriteByte(addr >> 16); /* Send address */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	240 SPI_WriteByte(addr >> 8);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	241 SPI_WriteByte(addr);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	242
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	243 readstate = RW_RUNNING;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	244 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	245
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	246 uint8_t
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	247 flashreadbyte(void) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	248 assert(readstate == RW_RUNNING);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	249 return SPI_WriteByte(0x00); /* Read data */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	250 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	251
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	252 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	253 flashstopread(void) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	254 assert(readstate == RW_RUNNING);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	255
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	256 FL_DESELECT();
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	257
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	258 readstate = RW_IDLE;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	259 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	260
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	261 /*
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	262 * Auto increment writing looks like so
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	263 *
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	264 * Enable writing CS, WREN, nCS
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	265 * Send start address & first data word CS, AAI + addr + data, nCS
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	266 * Send subsequent words wait for nBUSY, CS, AAI + data, nCS
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	267 * ...
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	268 * Disable writing CS, WRDI, nCS
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	269 *
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	270 * XXX: EBSY command links SO to flash busy state, I don't think the
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	271 * STM32 could sample it without switching out of SPI mode.
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	272 */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	273 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	274 flashstartwrite(uint32_t addr, uint16_t data) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	275 assert(writestate == RW_IDLE);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	276
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	277 flashenablewrite(); /* Enable writes */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	278
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	279 FL_SELECT(); /* Select device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	280
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	281 SPI_WriteByte(FL_AAIWP); /* Send command */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	282 SPI_WriteByte(addr >> 16);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	283 SPI_WriteByte(addr >> 8);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	284 SPI_WriteByte(addr & 0xff); /* Send address */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	285
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	286 SPI_WriteByte(data & 0xff); /* Write LSB */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	287 SPI_WriteByte(data >> 8); /* Write MSB */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	288
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	289 FL_DESELECT();
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	290
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	291 writestate = RW_RUNNING;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	292 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	293
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	294 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	295 flashwriteword(uint16_t data) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	296 assert(writestate == RW_RUNNING);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	297
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	298 flashwait(); /* Wait until not busy */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	299
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	300 FL_SELECT(); /* Select device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	301
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	302 SPI_WriteByte(FL_AAIWP); /* Send command */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	303 SPI_WriteByte(data & 0xff); /* Write LSB */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	304 SPI_WriteByte(data >> 8); /* Write MSB */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	305
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	306 FL_DESELECT(); /* De-select device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	307 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	308
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	309 void
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	310 flashstopwrite(void) {
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	311 assert(writestate == RW_RUNNING);
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	312
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	313 flashwait(); /* Wait until not busy */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	314
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	315 FL_SELECT(); /* Select device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	316
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	317 SPI_WriteByte(FL_WRDI); /* Send command */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	318
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	319 FL_DESELECT(); /* Deselect device */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	320
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	321 flashwait(); /* Wait until not busy */
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	322
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	323 writestate = RW_IDLE;
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	324 }
a9cc07caa801 Add stream read/write commands. Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	325

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate flash.c @ 26:74efdb21ae5d