stm32temp: hw.c annotate

annotate hw.c @ 86:345a42f6151b

Catch up with change to new board

author	Daniel O'Connor <darius@dons.net.au>
date	Thu, 12 Mar 2015 23:22:35 +1030
parents	bb52e6dad784
children	5fc6a25f40ef

rev	line source
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 #include <stdint.h>
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	2 #include <stdio.h>
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 #include "stm32f10x.h"
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	4
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	5 #include "1wire.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 #include "lcd.h"
30 435c6330896c Set tv_usec in gettimeofday() by using the prescaler counter. Daniel O'Connor <darius@dons.net.au> parents: 27 diff changeset	7 #include "rtc.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	8
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	9 #define I2C_TIMEOUT 10000
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 static void hw_port_cfg(void);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	12 void
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	13 hw_init(void) {
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	14 hw_port_cfg();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	15 lcd_init();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	16 lcd_setpwm(1000);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	17 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	18
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	19 static void
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	20 hw_port_cfg(void) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	21 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	22 FSMC_NORSRAMTimingInitTypeDef p;
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	23 GPIO_InitTypeDef GPIO_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	24 I2C_InitTypeDef I2C_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	25 SPI_InitTypeDef SPI_InitStructure;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	26 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	27 USART_InitTypeDef USART_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	28
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	29 /* Enable clocks */
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	30 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR \| RCC_APB1Periph_BKP \|
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	31 RCC_APB1Periph_TIM4 \| RCC_APB1Periph_I2C1,
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	32 ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	33
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	34 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 \| RCC_APB2Periph_GPIOA \|
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	35 RCC_APB2Periph_GPIOB \| RCC_APB2Periph_GPIOB \|
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	36 RCC_APB2Periph_GPIOC \| RCC_APB2Periph_GPIOD \|
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	37 RCC_APB2Periph_GPIOE \| RCC_APB2Periph_SPI1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	38
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	39 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC \| RCC_AHBPeriph_CRC \|
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	40 RCC_AHBPeriph_SDIO \| RCC_AHBPeriph_DMA2, ENABLE);
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	41
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	42
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	43 /* Allow access to BKP Domain */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	44 PWR_BackupAccessCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	45
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	46 /* Reset Backup Domain
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	47 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	48 * This resets the RTC etc back to 0 so probably only useful under user command
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	49 BKP_DeInit();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	50 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	51
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	52 /* Enable Low Speed External clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	53 RCC_LSEConfig(RCC_LSE_ON);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	54
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	55 /* Wait till LSE is ready */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	56 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	57 ;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	58
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	59 /* Select LSE as RTC Clock Source */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	60 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	61
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	62 /* Enable RTC Clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	63 RCC_RTCCLKCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	64
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	65 /* Wait for RTC registers synchronization */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	66 RTC_WaitForSynchro();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	67
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	68 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	69 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	70
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	71 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	72 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	73
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	74 /* Set RTC prescaler: set RTC period to 1sec */
30 435c6330896c Set tv_usec in gettimeofday() by using the prescaler counter. Daniel O'Connor <darius@dons.net.au> parents: 27 diff changeset	75 RTC_SetPrescaler(RTC_PRESCALE);
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	76
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	77 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	78 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	79
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	80 /* Port configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	81 /* Configure USART1 TX (PA.09) as alternate function push-pull */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	82 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	83 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	84 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	85 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	86
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	87 /* Configure USART1 RX (PA.10) as input floating */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	88 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	89 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	90 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	91
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	92 /* Configure PB5 as output push-pull for LED */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	93 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	94 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	95 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	96 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	97
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	98 /* Configure PB15 as input pull-up push-pull for push button */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	99 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	100 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	101 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	102 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	103
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	104 /* USART configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	105 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
86 345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	106 USART_InitStructure.USART_BaudRate = 38400;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	107 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	108 USART_InitStructure.USART_StopBits = USART_StopBits_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	109 USART_InitStructure.USART_Parity = USART_Parity_No;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	110 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	111 USART_InitStructure.USART_Mode = USART_Mode_Rx \| USART_Mode_Tx;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	112 USART_Init(USART1, &USART_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	113
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	114 /* Enable interrupts on receive data */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	115 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	116
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	117 /* Enable USART */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	118 USART_Cmd(USART1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	119
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	120 /* Enable FSMC clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	121
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	122 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	123 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	124 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	125 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	126 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	127 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 \| GPIO_Pin_1 \| GPIO_Pin_4 \| GPIO_Pin_5 \| GPIO_Pin_7 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	128 GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \| GPIO_Pin_11 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	129 GPIO_Pin_14 \| GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	130 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	131 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	132 GPIO_Init(GPIOD, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	133
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	134 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	135 * PE14(D11), PE15(D12)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	136 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	137 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 \| GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	138 GPIO_Pin_11 \| GPIO_Pin_12 \| GPIO_Pin_13 \| GPIO_Pin_14 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	140 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	142 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	143
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	144 /* Enable timer function
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	145 * Note source clock is SYSCLK / 2 = 36MHz
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	146 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	147 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	148 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	149 // XXX: PWM not working
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	150 //GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	151 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	152 GPIO_Init(GPIOD, &GPIO_InitStructure);
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	153 GPIO_SetBits(GPIOD, GPIO_Pin_13);
bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	154
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	155 /* Remap TIM4_CH2 to PD13 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	156 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	157
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	158 /* Reset TIM4 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	159 TIM_DeInit(TIM4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	160
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	161 /* Time Base configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	162 TIM_TimeBaseStructure.TIM_Period = 999;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	163 TIM_TimeBaseStructure.TIM_Prescaler = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	164 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	165 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	167 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	168
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	169 /* Enable timer */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	170 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	171 TIM_ARRPreloadConfig(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	172 TIM_Cmd(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	173
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	174 /* Configure reset pin (PE1) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	175 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	176 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	177 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	178 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	179
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	180 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	181 /* Timing configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	182 p.FSMC_AddressSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	183 p.FSMC_AddressHoldTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	184 p.FSMC_DataSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	185 p.FSMC_BusTurnAroundDuration = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	186 p.FSMC_CLKDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	187 p.FSMC_DataLatency = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	188 p.FSMC_AccessMode = FSMC_AccessMode_A;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	189
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	190 /* FSMC_Bank1_NORSRAM1 configured as follows:
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	191 - Data/Address MUX = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	192 - Memory Type = SRAM
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	193 - Data Width = 16bit
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	194 - Write Operation = Enable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	195 - Extended Mode = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	196 - Asynchronous Wait = Disable */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	197 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	198 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	199 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	200 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	201 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	202 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	203 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	204 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	205 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	206 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	207 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	208 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	209 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	210 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	211 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	212 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	213
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	214 /* Enable FSMC_Bank1_NORSRAM1 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	215 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	216
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	217 /* Configure touch screen controller
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	218 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	219 * Connected to SPI1 which is shared with the AT45DB161D.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	220 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	221 * The touch screen is selected with PB7.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	222 * The flash chip is selected with PA4.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	223 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	224
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	225 /* Configure MOSI, MISO and SCLK as alternate function PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	226 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 \| GPIO_Pin_6 \| GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	227 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	228 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	229 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	230
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	231 /* Configure flash chip select pin (PA4) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	232 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	233 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	234 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	235 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	236
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	237 /* Configure touch chip select pin (PB7) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	238 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	239 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	240 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	241 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	242
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	243 /* De-select touch & flash */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	244 GPIO_SetBits(GPIOA, GPIO_Pin_4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	245 GPIO_SetBits(GPIOB, GPIO_Pin_7);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	246
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	247 /* SPI1 Config */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	248 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	249 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	250 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	251 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	252 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	253 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
24 1e2fa7396f98 Reduce prescaler to 2, the flash is capable of 25MHz reads (although Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	254 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	255 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	256 SPI_InitStructure.SPI_CRCPolynomial = 7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	257 SPI_Init(SPI1, &SPI_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	258
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	259 /* SPI1 enable */
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	260 SPI_Cmd(SPI1, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	261
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	262 /* Setup GPIO for delay test (2) 1-wire (3) & temp ctrl (4/5)
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	263 * PE2 -> 3 (on header)
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	264 * PE3 -> 4
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	265 * PE4 -> 5
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	266 * PE5 -> 6
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	267 */
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 30 diff changeset	268 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 \| GPIO_Pin_3 \| GPIO_Pin_4 \| GPIO_Pin_5;
32 188d5a8a7470 Readd code accidentally removed from last version, now the hot & cold Daniel O'Connor <darius@dons.net.au> parents: 31 diff changeset	269 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
188d5a8a7470 Readd code accidentally removed from last version, now the hot & cold Daniel O'Connor <darius@dons.net.au> parents: 31 diff changeset	270 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
188d5a8a7470 Readd code accidentally removed from last version, now the hot & cold Daniel O'Connor <darius@dons.net.au> parents: 31 diff changeset	271 GPIO_Init(GPIOE, &GPIO_InitStructure);
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	272
86 345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	273 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 \| GPIO_Pin_9;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	274 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	275 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	276 GPIO_Init(GPIOC, &GPIO_InitStructure);
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	277
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	278 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 \| GPIO_Pin_12;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	279 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	280 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	281 GPIO_Init(GPIOA, &GPIO_InitStructure);
345a42f6151b Catch up with change to new board Daniel O'Connor <darius@dons.net.au> parents: 62 diff changeset	282
41 2db4bb90cfca Remove unused timer and (broken) I2C code. Daniel O'Connor <darius@dons.net.au> parents: 40 diff changeset	283 /* Setup 1-wire bus */
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	284 OWInit();
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	285
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	286 /* Setup I2C bus */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	287
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	288 /* Configure SCL/SDA pins */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	289 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 \| GPIO_Pin_9;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	290 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	291 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	292 GPIO_Init(GPIOB, &GPIO_InitStructure);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	293
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	294 /* Reset I2C1 */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	295 I2C_DeInit(I2C1);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	296
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	297 /* Setup I2C1 */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	298 I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	299 I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	300 I2C_InitStructure.I2C_OwnAddress1 = 0x00;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	301 I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	302 I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	303 I2C_InitStructure.I2C_ClockSpeed = 100000;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	304 I2C_Init(I2C1, &I2C_InitStructure);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	305
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	306 /* Start I2C controller */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	307 I2C_Cmd(I2C1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	308
41 2db4bb90cfca Remove unused timer and (broken) I2C code. Daniel O'Connor <darius@dons.net.au> parents: 40 diff changeset	309 /* Enable debug block for cycle counter
2db4bb90cfca Remove unused timer and (broken) I2C code. Daniel O'Connor <darius@dons.net.au> parents: 40 diff changeset	310 * From http://forums.arm.com/index.php?/topic/13949-cycle-count-in-cortex-m3/
2db4bb90cfca Remove unused timer and (broken) I2C code. Daniel O'Connor <darius@dons.net.au> parents: 40 diff changeset	311 * via http://stackoverflow.com/questions/11530593/cycle-counter-on-arm-cortex-m4-or-m3/11530829#11530829
2db4bb90cfca Remove unused timer and (broken) I2C code. Daniel O'Connor <darius@dons.net.au> parents: 40 diff changeset	312 */
40 a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 32 diff changeset	313 volatile uint32_t DWT_CONTROL = (uint32_t )0xe0001000;
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 32 diff changeset	314 volatile uint32_t SCB_DEMCR = (uint32_t )0xe000edfc;
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 32 diff changeset	315
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 32 diff changeset	316 SCB_DEMCR = SCB_DEMCR \| 0x01000000;
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 32 diff changeset	317 DWT_CONTROL = DWT_CONTROL \| 1 ; // enable the counter
49 ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	318
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	319 /* Setup SDIO
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	320 * See SD_LowLevelInit from libs/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	321 */
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	322
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	323 /* Configure SDIO pins for AF
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	324 PC8 -> SD0
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	325 PC9 -> SD1
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	326 PC10 -> SD2
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	327 PC11 -> SD3
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	328 PC12 -> SCK
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	329 */
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	330 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \| GPIO_Pin_11 \| GPIO_Pin_12;
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	331 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	332 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	333 GPIO_Init(GPIOC, &GPIO_InitStructure);
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	334
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	335 /* Configure PD2 -> CMD SDIO pin for AF */
ace431a0d0f5 Add SDIO code poached from STM. Use FatFS to read from SD card. Daniel O'Connor <darius@dons.net.au> parents: 41 diff changeset	336 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
62 bb52e6dad784 The LCD works better when the GPIO clocks are enabled before frobbing them. Daniel O'Connor <darius@dons.net.au> parents: 49 diff changeset	337 GPIO_Init(GPIOD, &GPIO_InitStructure);
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	338 }

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate hw.c @ 86:345a42f6151b