Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate flash.c @ 34:07589f738e5e
Update to reflect reality (ish)
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 11 Mar 2013 19:51:34 +1030 |
parents | 03592ca4d37e |
children | dcac5f08f87a |
rev | line source |
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1 #include <stdio.h> |
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2 #include <stdint.h> |
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3 #include <string.h> |
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4 #include <stdlib.h> |
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5 #include <assert.h> |
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6 |
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7 #include "stm32f10x.h" |
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8 #include "spi.h" |
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9 #include "flash.h" |
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10 |
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11 #define FL_SELECT() GPIO_ResetBits(GPIOA, GPIO_Pin_4) |
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12 #define FL_DESELECT() GPIO_SetBits(GPIOA, GPIO_Pin_4) |
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13 |
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14 static const char *flstattbl[] = { |
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15 "BUSY", |
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16 "WEL", |
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17 "BP0", |
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18 "BP1", |
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19 "BP2", |
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20 "BP3", |
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21 "AAI", |
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22 "BPL" |
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23 }; |
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24 |
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25 #define RW_IDLE 0 |
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26 #define RW_RUNNING 1 |
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27 |
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28 static int writestate = RW_IDLE; |
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29 static int readstate = RW_IDLE; |
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30 |
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31 void |
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32 flashcmd(int argc, char **argv) { |
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33 uint8_t status, tmp, len; |
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34 uint32_t addr; |
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35 |
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36 if (argc == 0) { |
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37 fputs("No command specified\r\n", stdout); |
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38 return; |
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39 } |
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40 |
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41 if (!strcmp(argv[0], "str")) { |
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42 status = flashreadstatus(); |
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43 fputs("Status = ", stdout); |
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44 for (unsigned int i = 0; i < sizeof(flstattbl) / sizeof(flstattbl[0]); i++) |
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45 if (status & 1 << i) { |
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46 fputs(flstattbl[i], stdout); |
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47 fputs(" ", stdout); |
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48 } |
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49 printf("(0x%02x)\r\n", status); |
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50 } else if (!strcmp(argv[0], "stw")) { |
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51 if (argc != 2) { |
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52 fputs("Incorrect number of arguments\r\n", stdout); |
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53 return; |
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54 } |
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55 tmp = atoi(argv[1]); |
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56 flashwritestatus(tmp); |
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57 status = flashreadstatus(); |
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58 printf("Wrote 0x%02x to status, now 0x%02x\r\n", tmp, status); |
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59 } else if (!strcmp(argv[0], "er")) { |
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60 if (argc != 2) { |
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61 fputs("Incorrect number of arguments\r\n", stdout); |
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62 return; |
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63 } |
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64 addr = atoi(argv[1]); |
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65 flash4kerase(addr); |
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66 printf("Erased 0x%x\r\n", (unsigned int)addr); |
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67 } else if (!strcmp(argv[0], "rd")) { |
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68 if (argc < 2) { |
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69 fputs("Incorrect number of arguments\r\n", stdout); |
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70 return; |
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71 } |
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72 |
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73 addr = atoi(argv[1]); |
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74 |
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75 if (argc > 2) |
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76 len = atoi(argv[2]); |
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77 else |
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78 len = 16; |
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79 |
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80 flashstartread(addr); |
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81 |
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82 for (uint32_t i = 0; i < len; i++) |
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83 printf("Read 0x%02x from 0x%06x\r\n", flashreadbyte(), (unsigned int)(addr + i)); |
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84 flashstopread(); |
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85 |
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86 fputs("\r\n", stdout); |
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87 } else if (!strcmp(argv[0], "wr")) { |
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88 if (argc < 2) { |
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89 fputs("Incorrect number of arguments\r\n", stdout); |
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90 return; |
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91 } |
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92 |
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93 addr = atoi(argv[1]); |
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94 |
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95 if (argc > 2) |
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96 len = atoi(argv[2]); |
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97 else |
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98 len = 16; |
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99 |
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100 for (int i = 0; i < 16; i += 2) { |
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101 uint16_t data; |
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102 data = ((i + 1) << 8) | i; |
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103 printf("Writing 0x%04x to 0x%06x\r\n", data, (unsigned int)(addr + i)); |
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104 |
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105 if (i == 0) |
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106 flashstartwrite(addr, data); |
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107 else |
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108 flashwriteword(data); |
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109 } |
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110 flashstopwrite(); |
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111 } else if (!strcmp(argv[0], "id")) { |
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112 printf("Flash ID = 0x%04hx (expect 0xbf41)\r\n", flashreadid()); |
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113 } else { |
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114 fputs("Unknown sub command\r\n", stdout); |
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115 return; |
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116 } |
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117 } |
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118 |
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119 void |
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120 flash4kerase(uint32_t addr) { |
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121 flashenablewrite(); /* Enable writing */ |
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122 |
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123 FL_SELECT(); /* Select device */ |
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124 |
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125 SPI_WriteByte(FL_4KERASE); /* Send command */ |
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126 SPI_WriteByte(addr >> 16); /* Send address */ |
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127 SPI_WriteByte(addr >> 8); |
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128 SPI_WriteByte(addr); |
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129 |
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130 FL_DESELECT(); |
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131 |
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132 //fputs("4k erase ", stdout); |
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133 flashwait(); |
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134 } |
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135 |
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136 void |
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137 flashwait(void) { |
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138 uint8_t cnt; |
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139 |
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140 /* Wait for not BUSY */ |
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141 for (cnt = 0; (flashreadstatus() & FL_BUSY) != 0; cnt++) |
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142 ; |
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143 |
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144 //printf("cnt = %d\r\n", cnt); |
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145 } |
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146 |
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147 uint16_t |
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148 flashreadid(void) { |
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149 uint8_t fac, dev; |
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150 |
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151 FL_SELECT(); /* Select device */ |
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152 |
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153 SPI_WriteByte(FL_RDID); /* Send command */ |
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154 SPI_WriteByte(0x00); /* Send address cycles (ID data starts at 0) */ |
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155 SPI_WriteByte(0x00); |
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156 SPI_WriteByte(0x00); |
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157 fac = SPI_WriteByte(0x00); /* Read ID */ |
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158 dev = SPI_WriteByte(0x00); |
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159 |
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160 FL_DESELECT(); /* De-select device */ |
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161 |
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162 return fac << 8 | dev; |
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163 } |
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164 |
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165 void |
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166 flashenablewrite(void) { |
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167 FL_SELECT(); /* Select device */ |
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168 |
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169 SPI_WriteByte(FL_WREN); /* Send command */ |
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170 |
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171 FL_DESELECT(); /* De-select device */ |
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172 } |
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173 |
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174 uint8_t |
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175 flashreadstatus(void) { |
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176 uint8_t status; |
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177 |
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178 FL_SELECT(); /* Select device */ |
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179 |
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180 SPI_WriteByte(FL_RDSR); /* Send command */ |
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181 SPI_WriteByte(0x00); /* Send dummy byte for address cycle */ |
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182 status = SPI_WriteByte(0x00); /* Read status */ |
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183 |
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184 FL_DESELECT(); /* De-select device */ |
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185 |
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186 return status; |
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187 } |
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188 |
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189 void |
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190 flashwritestatus(uint8_t status) { |
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191 /* Enable status write */ |
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192 FL_SELECT(); /* Select device */ |
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193 SPI_WriteByte(FL_EWSR); /* Send command */ |
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194 SPI_WriteByte(0x00); /* Send data byte */ |
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195 FL_DESELECT(); |
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196 |
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197 /* Actually write status */ |
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198 FL_SELECT(); /* Re-select device for new command */ |
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199 SPI_WriteByte(FL_WRSR); /* Send command */ |
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200 SPI_WriteByte(status); /* Send data byte */ |
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201 FL_DESELECT(); /* De-select device */ |
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202 } |
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203 |
21
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204 uint8_t |
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205 flashread(uint32_t addr) { |
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206 uint8_t data; |
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207 |
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208 FL_SELECT(); /* Select device */ |
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209 |
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210 SPI_WriteByte(FL_READ); /* Send command */ |
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211 SPI_WriteByte(addr >> 16); /* Send address */ |
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212 SPI_WriteByte(addr >> 8); |
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213 SPI_WriteByte(addr); |
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214 data = SPI_WriteByte(0x00); /* Read data */ |
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215 |
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216 FL_DESELECT(); /* De-select device */ |
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217 |
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218 return data; |
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219 } |
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220 |
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221 void |
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222 flashwrite(uint32_t addr, uint8_t data) { |
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223 flashwait(); |
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224 flashenablewrite(); /* Enable writes */ |
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225 |
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226 FL_SELECT(); /* Select device */ |
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227 |
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228 SPI_WriteByte(FL_BYTEPROG); /* Send command */ |
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229 SPI_WriteByte(addr >> 16); /* Send address */ |
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230 SPI_WriteByte(addr >> 8); |
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231 SPI_WriteByte(addr); |
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232 SPI_WriteByte(data); /* Write data */ |
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233 |
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234 FL_DESELECT(); /* De-select device */ |
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235 |
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236 } |
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237 |
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238 /* |
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239 * fStream reading looks like so |
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240 * |
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241 */ |
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242 |
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243 void |
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244 flashstartread(uint32_t addr) { |
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245 assert(readstate == RW_IDLE); |
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246 |
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247 FL_SELECT(); /* Select device */ |
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248 |
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249 SPI_WriteByte(FL_READ); /* Send command */ |
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250 SPI_WriteByte(addr >> 16); /* Send address */ |
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251 SPI_WriteByte(addr >> 8); |
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252 SPI_WriteByte(addr); |
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253 |
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254 readstate = RW_RUNNING; |
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255 } |
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256 |
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257 uint8_t |
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258 flashreadbyte(void) { |
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259 assert(readstate == RW_RUNNING); |
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260 return SPI_WriteByte(0x00); /* Read data */ |
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261 } |
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262 |
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263 void |
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264 flashstopread(void) { |
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265 assert(readstate == RW_RUNNING); |
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266 |
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267 FL_DESELECT(); |
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268 |
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269 readstate = RW_IDLE; |
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270 } |
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271 |
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272 /* |
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273 * Auto increment writing looks like so |
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274 * |
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275 * Enable writing CS, WREN, nCS |
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276 * Send start address & first data word CS, AAI + addr + data, nCS |
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277 * Send subsequent words wait for nBUSY, CS, AAI + data, nCS |
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278 * ... |
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279 * Disable writing CS, WRDI, nCS |
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280 * |
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281 * XXX: EBSY command links SO to flash busy state, I don't think the |
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282 * STM32 could sample it without switching out of SPI mode. |
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283 */ |
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284 void |
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285 flashstartwrite(uint32_t addr, uint16_t data) { |
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286 assert(writestate == RW_IDLE); |
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287 |
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288 flashenablewrite(); /* Enable writes */ |
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289 |
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290 FL_SELECT(); /* Select device */ |
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291 |
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292 SPI_WriteByte(FL_AAIWP); /* Send command */ |
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293 SPI_WriteByte(addr >> 16); |
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294 SPI_WriteByte(addr >> 8); |
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295 SPI_WriteByte(addr & 0xff); /* Send address */ |
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296 |
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297 SPI_WriteByte(data & 0xff); /* Write LSB */ |
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298 SPI_WriteByte(data >> 8); /* Write MSB */ |
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299 |
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300 FL_DESELECT(); |
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301 |
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302 writestate = RW_RUNNING; |
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303 } |
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304 |
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305 void |
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306 flashwriteword(uint16_t data) { |
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307 assert(writestate == RW_RUNNING); |
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308 |
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309 //fputs("write word ", stdout); |
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310 flashwait(); /* Wait until not busy */ |
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311 |
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312 FL_SELECT(); /* Select device */ |
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313 |
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314 SPI_WriteByte(FL_AAIWP); /* Send command */ |
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315 SPI_WriteByte(data & 0xff); /* Write LSB */ |
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316 SPI_WriteByte(data >> 8); /* Write MSB */ |
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317 |
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318 FL_DESELECT(); /* De-select device */ |
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319 } |
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320 |
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321 void |
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322 flashstopwrite(void) { |
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323 assert(writestate == RW_RUNNING); |
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324 |
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325 //fputs("flash stop write start ", stdout); |
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326 flashwait(); /* Wait until not busy */ |
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327 |
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328 FL_SELECT(); /* Select device */ |
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329 |
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330 SPI_WriteByte(FL_WRDI); /* Send command */ |
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331 |
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332 FL_DESELECT(); /* Deselect device */ |
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333 |
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334 //fputs("flash stop write end ", stdout); |
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335 flashwait(); /* Wait until not busy */ |
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336 |
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337 writestate = RW_IDLE; |
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338 } |
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339 |
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340 int |
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341 flashreadblock(uint32_t addr, uint32_t len, void *_data) { |
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342 uint8_t *data = _data; |
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343 uint32_t flashcrc, ramcrc; |
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344 |
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345 /* Must be a multiple of 4 due to CRC check */ |
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346 assert(len % 4 == 0); |
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347 |
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348 flashstartread(addr); |
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349 for (int i = len; i > 0; i--) { |
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350 *data = flashreadbyte(); |
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351 data++; |
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352 } |
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353 |
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354 flashcrc = flashreadbyte(); |
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355 flashcrc |= flashreadbyte() << 8; |
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356 flashcrc |= flashreadbyte() << 16; |
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357 flashcrc |= flashreadbyte() << 24; |
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358 |
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359 flashstopread(); |
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360 |
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361 /* Calculate CRC */ |
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362 CRC_ResetDR(); |
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363 ramcrc = CRC_CalcBlockCRC((uint32_t *)_data, len / 4); |
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364 |
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365 printf("RAM CRC 0x%08x Flash CRC 0x%08x\r\n", (uint)ramcrc, (uint)flashcrc); |
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366 |
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367 if (ramcrc == flashcrc) |
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368 return 1; |
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369 else |
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370 return 0; |
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371 } |
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372 |
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373 void |
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374 flashwriteblock(uint32_t addr, uint32_t len, void *_data) { |
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375 uint16_t *data = _data; |
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376 uint32_t crc; |
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377 |
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378 printf("Writing %u bytes to 0x%06x\r\n", (uint)len, (uint)addr); |
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379 |
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380 /* Ensure data is |
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381 * - 16 bit aligned |
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382 * - a multiple of 32 bits in length (for CRCs, the flash only need 16 bits) |
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383 * - not longer than a sector |
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384 */ |
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385 assert(addr % 2 == 0); |
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386 assert(len % 4 == 0); |
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387 assert(len <= 4096); |
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388 |
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389 /* Disable write protect */ |
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390 flashwritestatus(0x00); |
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391 |
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392 /* Erase sector */ |
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393 flash4kerase(addr); |
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394 |
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395 /* Write data */ |
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396 for (uint i = 0; i < len / 2; i++) { |
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397 if (i == 0) |
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398 flashstartwrite(addr, *data); |
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399 else |
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400 flashwriteword(*data); |
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401 data++; |
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402 } |
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403 |
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404 /* Calculate CRC */ |
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405 CRC_ResetDR(); |
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406 crc = CRC_CalcBlockCRC((uint32_t *)_data, len / 4); |
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407 |
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408 printf("CRC is 0x%08x\r\n", (uint)crc); |
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409 |
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410 /* Write CRC */ |
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411 flashwriteword(crc); |
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412 flashwriteword(crc >> 16); |
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413 |
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414 flashstopwrite(); |
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415 } |