--- a/ctrl.pio	Tue Feb 25 13:40:57 2025 +1030
+++ b/ctrl.pio	Tue Feb 25 14:36:10 2025 +1030
@@ -8,6 +8,7 @@
     mov pins, null
 ; Wait for start trigger and clear IRQ
     wait 1 irq TRIGGER_IRQ
+    irq clear TRIGGER_IRQ
 .wrap_target
     out pins 8
     nop

--- a/dac.pio	Tue Feb 25 13:40:57 2025 +1030
+++ b/dac.pio	Tue Feb 25 14:36:10 2025 +1030
@@ -11,10 +11,10 @@
     mov pins, null side 0
     nop side 1
 ; Wait for start trigger and clear IRQ
-    wait 1 irq TRIGGER_IRQ side 0
+    wait 1 irq 1 side 0
+    irq clear 1 side 0
 ; Clock DAC and write data from the FIFO
 ; DAC clocks data in on the rising clock edge
-; Autopull is enabled so no need to pull
 .wrap_target
     out pins 8 side 0
     nop side 1

--- a/modulator.c	Tue Feb 25 13:40:57 2025 +1030
+++ b/modulator.c	Tue Feb 25 14:36:10 2025 +1030
@@ -16,6 +16,8 @@
 ** Create modulation shape
 **
 */
+#define WITH_CTRL
+//#define WITH_TRIGGER
 
 #include <stdio.h>
 #include <string.h>
@@ -78,13 +80,14 @@
 uint dac_sm;
 // Instruction offset for DAC PIO program
 uint dac_pio_sm_offset;
-
+#ifdef WITH_CTRL
 // DMA channel to feed ctrl PIO
 static int ctrl_dma_chan;
 // Ctrl SM
 uint ctrl_sm;
 // Instruction offset for ctrl PIO program
 uint ctrl_pio_sm_offset;
+#endif
 
 /*
  * Use a DMA channel to feed PIO0 SM0 with pulse data.
@@ -99,30 +102,40 @@
  */
 void
 dma_handler(void) {
+  printf("dma_handler %d\n", get_core_num());
   // Clear the interrupt request.
   dma_hw->ints0 = 1u << dac_dma_chan;
 
-  printf("DAC: transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
-  printf("DAC: transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
+  printf("DAC transfers %lu\n", dma_channel_hw_addr(dac_dma_chan)->transfer_count);
+#ifdef WITH_CTRL
+  printf("Ctrl transfers %lu\n", dma_channel_hw_addr(ctrl_dma_chan)->transfer_count);
+#endif
 
   // Reset DAQ & ctrl PIO SMs so they are  waiting for a trigger
   pio_sm_exec(pulse_pio, dac_sm, pio_encode_jmp(dac_pio_sm_offset));
+#ifdef WITH_CTRL
   pio_sm_exec(pulse_pio, ctrl_sm, pio_encode_jmp(ctrl_pio_sm_offset));
+#endif
 
   // Setup next pulse data & ctrl DMA addresses
   dma_channel_wait_for_finish_blocking(dac_dma_chan);
   dma_channel_set_read_addr(dac_dma_chan, pulse_data, true);
+#ifdef WITH_CTRL
   dma_channel_wait_for_finish_blocking(ctrl_dma_chan);
   dma_channel_set_read_addr(ctrl_dma_chan, pulse_ctrl, true);
+#endif
 }
 
 
 void
 pwm_wrap(void) {
+  printf("pwm_wrap %d\n", get_core_num());
   pwm_clear_irq(slice_num);
 
+#ifndef WITH_TRIGGER
   // Manually trigger DAQ SM (cleared by SM)
-  pio0->irq_force = 1 << 0;
+  pulse_pio->irq_force = 3;
+#endif
 
   // 'scope trigger
   gpio_put(2, 1);
@@ -343,6 +356,8 @@
     unsigned long long diff = absolute_time_diff_us(then, now);
     printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
 	   diff, idx, (float)diff * 1000.0 / idx);
+    unsigned transfers = (idx + 3) >> 2;
+    printf("Using %u transfers\n", transfers);
     //__breakpoint();
 
     // Load the DAC program, and configure a free state machine
@@ -371,8 +386,8 @@
         &dac_dmac,
         &pulse_pio->txf[dac_sm],   // Write address
         pulse_data,                // Pulse data
-        (idx + 3) >> 2,	           // Transfer count (round up to 4 bytes)
-        true                       // Start, SM will wait for trigger
+        transfers,	           // Transfer count
+        true			   // Start transfer
     );
 
     // Tell the DMA to raise IRQ line 0 when the channel finishes a block
@@ -382,6 +397,7 @@
     irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
     irq_set_enabled(DMA_IRQ_0, true);
 
+#ifdef WITH_CTRL
     // Load the ctrl program, and configure a free state machine
     // to run the program.
     ctrl_pio_sm_offset = pio_add_program(pulse_pio, &ctrl_program);
@@ -405,12 +421,13 @@
         &ctrl_dmac,
         &pulse_pio->txf[ctrl_sm],  // Write address
         pulse_ctrl,                // Ctrl data
-        (idx + 3) >> 2,	           // Transfer count (round up to 4 bytes)
-        true                       // Start, SM will wait for trigger
+        transfers,	           // Transfer count
+        true			   // Start transfer
     );
     // No IRQ, piggyback on the data one
+#endif
 
-#if 0
+#ifdef WITH_TRIGGER
     // Load the trigger program, and configure a free state machine
     // to run the program.
     uint trigger_pio_sm_offset = pio_add_program(pulse_pio, &trigger_program);