;
; Copyright (c) 2025 Daniel O'Connor
;

.program dac
.define TRIGGER_IRQ 0
; Need 1 side set pin, the clock
.side_set 1

; Clock in a 0 byte
    mov pins, null side 0
    nop side 1
; Wait for start trigger and clear IRQ
    wait 1 irq TRIGGER_IRQ side 0
; Clock DAC and write data from the FIFO
; DAC clocks data in on the rising clock edge
.wrap_target
    out pins 8 side 0 [1]
    nop side 1        [1]
    out pins 8 side 0 [1]
    nop side 1        [1]
    out pins 8 side 0 [1]
    nop side 1        [1]
    out pins 8 side 0 [1]
    nop side 1        [1]
.wrap

% c-sdk {
static inline void dac_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) {
    pio_sm_config c = dac_program_get_default_config(offset);

    // Set the OUT base pin to the provided `pin` parameter.
    // First 8 pins are data, last is clock
    sm_config_set_out_pins(&c, pin, 9);
    // Set the pin directions to output at the PIO
    pio_sm_set_consecutive_pindirs(pio, sm, pin, 9, true);
    // Connect these GPIOs to this PIO block
    for (int i = 0; i < 9; i++)
        pio_gpio_init(pio, pin + i);

    sm_config_set_out_shift(
        &c,
        true,  // Shift-to-right
        true,  // Autopull enabled
        32     // Autopull threshold (bits!)
    );

    // Configure sideset pin to use for clock
    sm_config_set_sideset_pins(&c, pin + 8);

    // We only send, so disable the RX FIFO to make the TX FIFO deeper.
    sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);

    sm_config_set_clkdiv(&c, clkdiv);

    // Load our configuration
    pio_sm_init(pio, sm, offset, &c);
}
%}