;
; Copyright (c) 2025 Daniel O'Connor
;

.program ctrl
.define DAC_TRIGGER_IRQ 0
.define CTRL_TRIGGER_IRQ 1

; Assert all 0s
    mov pins, null
; Wait for start trigger and clear IRQ
    wait 1 irq CTRL_TRIGGER_IRQ
.wrap_target
    out pins 8
    nop
    out pins 8
    nop
    out pins 8
    nop
    out pins 8
    nop
.wrap

% c-sdk {
static inline void ctrl_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) {
    pio_sm_config c = ctrl_program_get_default_config(offset);

    // Set the OUT base pin to the provided `pin` parameter.
    // Note: We only need 6 pins but pull a byte at a time to make
    // generating the data simpler
    sm_config_set_out_pins(&c, pin, 6);
    // Set the pin directions to output at the PIO
    pio_sm_set_consecutive_pindirs(pio, sm, pin, 6, true);
    // Connect these GPIOs to this PIO block
    for (int i = 0; i < 6; i++)
        pio_gpio_init(pio, pin + i);

    sm_config_set_out_shift(
        &c,
        true,  // Shift-to-right
        true,  // Autopull enabled
        32     // Autopull threshold (bits!)
    );

    // We only send, so disable the RX FIFO to make the TX FIFO deeper.
    sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);

    sm_config_set_clkdiv(&c, clkdiv);

    // Load our configuration, and start the program from the beginning
    pio_sm_init(pio, sm, offset, &c);
    pio_sm_set_enabled(pio, sm, true);
}
%}