Mercurial > ~darius > hgwebdir.cgi > modulator
diff ctrl.pio @ 28:600a394629e6
Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?)
Don't need to unroll the PIO loops.
Create PIo function to reset each PIO.
Check the DMA IRQ is for us - we get unknown IRQs which need to be ignored or things break.
| author | Daniel O'Connor <darius@dons.net.au> |
|---|---|
| date | Thu, 27 Feb 2025 13:58:37 +1030 |
| parents | e1d8fe3e418a |
| children |
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--- a/ctrl.pio Wed Feb 26 11:03:59 2025 +1030 +++ b/ctrl.pio Thu Feb 27 13:58:37 2025 +1030 @@ -2,22 +2,18 @@ ; Copyright (c) 2025 Daniel O'Connor ; +.program ctrl .define TRIGGER_IRQ 0 -.program ctrl +PUBLIC init: ; Assert all 0s mov pins, null + nop ; Wait for start trigger and clear IRQ wait 1 irq TRIGGER_IRQ .wrap_target out pins 8 [1] nop [1] - out pins 8 [1] - nop [1] - out pins 8 [1] - nop [1] - out pins 8 [1] - nop [1] .wrap % c-sdk { @@ -38,7 +34,7 @@ &c, true, // Shift-to-right true, // Autopull enabled - 32 // Autopull threshold (bits!) + 8 // Autopull threshold (bits!) ); // We only send, so disable the RX FIFO to make the TX FIFO deeper. @@ -46,7 +42,12 @@ sm_config_set_clkdiv(&c, clkdiv); - // Load our configuration + // Load our configuration (but don't start) pio_sm_init(pio, sm, offset, &c); } + +static inline uint ctrl_reset_instr (uint offset) { + // encode a "jmp init side 0" instruction for the state machine + return pio_encode_jmp (offset + ctrl_offset_init); +} %}