comparison dac.pio @ 27:e1d8fe3e418a

Run PIOs at 1x with delays and sync. Can now use a single trigger to set both DAC & ctrl. DAC [still] jitters against the ctrl though..
author Daniel O'Connor <darius@dons.net.au>
date Wed, 26 Feb 2025 11:03:59 +1030
parents 6070d2e66b4c
children 600a394629e6
comparison
equal deleted inserted replaced
26:336f06fa6e47 27:e1d8fe3e418a
1 ; 1 ;
2 ; Copyright (c) 2025 Daniel O'Connor 2 ; Copyright (c) 2025 Daniel O'Connor
3 ; 3 ;
4 4
5 .program dac 5 .program dac
6 .define DAC_IRQ 0 6 .define TRIGGER_IRQ 0
7 .define DAC_TRIGGER_IRQ 0
8 .define CTRL_TRIGGER_IRQ 1
9 ; Need 1 side set pin, the clock 7 ; Need 1 side set pin, the clock
10 .side_set 1 8 .side_set 1
11 9
12 ; Clock in a 0 byte 10 ; Clock in a 0 byte
13 mov pins, null side 0 11 mov pins, null side 0
14 nop side 1 12 nop side 1
15 ; Wait for start trigger and clear IRQ 13 ; Wait for start trigger and clear IRQ
16 wait 1 irq DAC_TRIGGER_IRQ side 0 14 wait 1 irq TRIGGER_IRQ side 0
17 ; Trigger the control SM
18 irq nowait CTRL_TRIGGER_IRQ side 0
19 ; Clock DAC and write data from the FIFO 15 ; Clock DAC and write data from the FIFO
20 ; DAC clocks data in on the rising clock edge 16 ; DAC clocks data in on the rising clock edge
21 .wrap_target 17 .wrap_target
22 out pins 8 side 0 18 out pins 8 side 0 [1]
23 nop side 1 19 nop side 1 [1]
24 out pins 8 side 0 20 out pins 8 side 0 [1]
25 nop side 1 21 nop side 1 [1]
26 out pins 8 side 0 22 out pins 8 side 0 [1]
27 nop side 1 23 nop side 1 [1]
28 out pins 8 side 0 24 out pins 8 side 0 [1]
29 nop side 1 25 nop side 1 [1]
30 .wrap 26 .wrap
31 27
32 % c-sdk { 28 % c-sdk {
33 static inline void dac_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) { 29 static inline void dac_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) {
34 pio_sm_config c = dac_program_get_default_config(offset); 30 pio_sm_config c = dac_program_get_default_config(offset);
55 // We only send, so disable the RX FIFO to make the TX FIFO deeper. 51 // We only send, so disable the RX FIFO to make the TX FIFO deeper.
56 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX); 52 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
57 53
58 sm_config_set_clkdiv(&c, clkdiv); 54 sm_config_set_clkdiv(&c, clkdiv);
59 55
60 // Load our configuration, and start the program from the beginning 56 // Load our configuration
61 pio_sm_init(pio, sm, offset, &c); 57 pio_sm_init(pio, sm, offset, &c);
62 pio_sm_set_enabled(pio, sm, true);
63 } 58 }
64 %} 59 %}