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comparison ctrl.pio @ 28:600a394629e6

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Use 8 bit auto pull otherwise the PIOs jitter (due to DMA contention I guess?) Don't need to unroll the PIO loops. Create PIo function to reset each PIO. Check the DMA IRQ is for us - we get unknown IRQs which need to be ignored or things break.
author Daniel O'Connor <darius@dons.net.au>
date Thu, 27 Feb 2025 13:58:37 +1030
parents e1d8fe3e418a
children
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27:e1d8fe3e418a 28:600a394629e6
1 ; 1 ;
2 ; Copyright (c) 2025 Daniel O'Connor 2 ; Copyright (c) 2025 Daniel O'Connor
3 ; 3 ;
4 4
5 .program ctrl
5 .define TRIGGER_IRQ 0 6 .define TRIGGER_IRQ 0
6 7
7 .program ctrl 8 PUBLIC init:
8 ; Assert all 0s 9 ; Assert all 0s
9 mov pins, null 10 mov pins, null
11 nop
10 ; Wait for start trigger and clear IRQ 12 ; Wait for start trigger and clear IRQ
11 wait 1 irq TRIGGER_IRQ 13 wait 1 irq TRIGGER_IRQ
12 .wrap_target 14 .wrap_target
13 out pins 8 [1]
14 nop [1]
15 out pins 8 [1]
16 nop [1]
17 out pins 8 [1]
18 nop [1]
19 out pins 8 [1] 15 out pins 8 [1]
20 nop [1] 16 nop [1]
21 .wrap 17 .wrap
22 18
23 % c-sdk { 19 % c-sdk {
36 32
37 sm_config_set_out_shift( 33 sm_config_set_out_shift(
38 &c, 34 &c,
39 true, // Shift-to-right 35 true, // Shift-to-right
40 true, // Autopull enabled 36 true, // Autopull enabled
41 32 // Autopull threshold (bits!) 37 8 // Autopull threshold (bits!)
42 ); 38 );
43 39
44 // We only send, so disable the RX FIFO to make the TX FIFO deeper. 40 // We only send, so disable the RX FIFO to make the TX FIFO deeper.
45 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX); 41 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
46 42
47 sm_config_set_clkdiv(&c, clkdiv); 43 sm_config_set_clkdiv(&c, clkdiv);
48 44
49 // Load our configuration 45 // Load our configuration (but don't start)
50 pio_sm_init(pio, sm, offset, &c); 46 pio_sm_init(pio, sm, offset, &c);
51 } 47 }
48
49 static inline uint ctrl_reset_instr (uint offset) {
50 // encode a "jmp init side 0" instruction for the state machine
51 return pio_encode_jmp (offset + ctrl_offset_init);
52 }
52 %} 53 %}