comparison ctrl.pio @ 16:56a79dce90e9

Commit WIP ctrl code
author Daniel O'Connor <darius@dons.net.au>
date Tue, 25 Feb 2025 13:31:27 +1030
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children f1e44afb41a3
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15:bf483219cb12 16:56a79dce90e9
1 ;
2 ; Copyright (c) 2025 Daniel O'Connor
3 ;
4
5 .program ctrl
6 .define TRIGGER_IRQ 0
7 ; Assert all 0s
8 mov pins, null
9 ; Wait for start trigger and clear IRQ
10 wait 1 irq TRIGGER_IRQ
11 .wrap_target
12 out pins 8
13 nop
14 out pins 8
15 nop
16 out pins 8
17 nop
18 out pins 8
19 nop
20 .wrap
21
22 % c-sdk {
23 static inline void ctrl_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) {
24 pio_sm_config c = dac_program_get_default_config(offset);
25
26 // Set the OUT base pin to the provided `pin` parameter.
27 // Note: We only need 6 pins but pull a byte at a time to make
28 // generating the data simpler
29 sm_config_set_out_pins(&c, pin, 6);
30 // Set the pin directions to output at the PIO
31 pio_sm_set_consecutive_pindirs(pio, sm, pin, 6, true);
32 // Connect these GPIOs to this PIO block
33 for (int i = 0; i < 6; i++)
34 pio_gpio_init(pio, pin + i);
35
36 sm_config_set_out_shift(
37 &c,
38 true, // Shift-to-right
39 true, // Autopull enabled
40 32 // Autopull threshold (bits!)
41 );
42
43 // We only send, so disable the RX FIFO to make the TX FIFO deeper.
44 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
45
46 sm_config_set_clkdiv(&c, clkdiv);
47
48 // Load our configuration, and start the program from the beginning
49 pio_sm_init(pio, sm, offset, &c);
50 pio_sm_set_enabled(pio, sm, true);
51 }
52 %}