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annotate ctrl.pio @ 18:f1e44afb41a3
WIP with control and DAC in sync and not hanging.
Control data is wrong but baby steps.
author | Daniel O'Connor <darius@dons.net.au> |
---|---|
date | Tue, 25 Feb 2025 14:36:10 +1030 |
parents | 56a79dce90e9 |
children | 8d759cf5a9e7 |
rev | line source |
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16 | 1 ; |
2 ; Copyright (c) 2025 Daniel O'Connor | |
3 ; | |
4 | |
5 .program ctrl | |
6 .define TRIGGER_IRQ 0 | |
7 ; Assert all 0s | |
8 mov pins, null | |
9 ; Wait for start trigger and clear IRQ | |
10 wait 1 irq TRIGGER_IRQ | |
18
f1e44afb41a3
WIP with control and DAC in sync and not hanging.
Daniel O'Connor <darius@dons.net.au>
parents:
16
diff
changeset
|
11 irq clear TRIGGER_IRQ |
16 | 12 .wrap_target |
13 out pins 8 | |
14 nop | |
15 out pins 8 | |
16 nop | |
17 out pins 8 | |
18 nop | |
19 out pins 8 | |
20 nop | |
21 .wrap | |
22 | |
23 % c-sdk { | |
24 static inline void ctrl_program_init(PIO pio, uint sm, uint offset, uint pin, uint clkdiv) { | |
25 pio_sm_config c = dac_program_get_default_config(offset); | |
26 | |
27 // Set the OUT base pin to the provided `pin` parameter. | |
28 // Note: We only need 6 pins but pull a byte at a time to make | |
29 // generating the data simpler | |
30 sm_config_set_out_pins(&c, pin, 6); | |
31 // Set the pin directions to output at the PIO | |
32 pio_sm_set_consecutive_pindirs(pio, sm, pin, 6, true); | |
33 // Connect these GPIOs to this PIO block | |
34 for (int i = 0; i < 6; i++) | |
35 pio_gpio_init(pio, pin + i); | |
36 | |
37 sm_config_set_out_shift( | |
38 &c, | |
39 true, // Shift-to-right | |
40 true, // Autopull enabled | |
41 32 // Autopull threshold (bits!) | |
42 ); | |
43 | |
44 // We only send, so disable the RX FIFO to make the TX FIFO deeper. | |
45 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX); | |
46 | |
47 sm_config_set_clkdiv(&c, clkdiv); | |
48 | |
49 // Load our configuration, and start the program from the beginning | |
50 pio_sm_init(pio, sm, offset, &c); | |
51 pio_sm_set_enabled(pio, sm, true); | |
52 } | |
53 %} |