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annotate modulator.c @ 10:98880b18bcc1

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Reset DAC PIO and use force trigger to do manual trigger.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 24 Feb 2025 12:12:09 +1030
parents 3acdebd7eec7
children e9d12b36cfcc
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1 /******************************************************************
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2 *******************************************************************
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3 **
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4 ** This is proprietary unpublished source code, property
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5 ** of Genesis Software. Use or disclosure without prior
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6 ** agreement is expressly prohibited.
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7 **
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8 ** Copyright (c) 2021 Genesis Software, all rights reserved.
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9 **
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10 *******************************************************************
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11 ******************************************************************/
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12
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13 /*
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14 ** MODULATOR.C
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15 **
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16 ** Create modulation shape
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17 **
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18 */
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19
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20 #include <stdio.h>
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21 #include <string.h>
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22 #include "bitstring.h"
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23
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24 #pragma GCC diagnostic push
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25 #pragma GCC diagnostic ignored "-Wtype-limits"
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26 #pragma GCC diagnostic ignored "-Wsign-compare"
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27 #include "pico/stdlib.h"
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28 #include "hardware/clocks.h"
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29 #include "hardware/dma.h"
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30 #include "hardware/interp.h"
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31 #include "hardware/irq.h"
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32 #include "hardware/pll.h"
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33 #include "hardware/pio.h"
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34 #include "hardware/pwm.h"
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35 #include "hardware/structs/pll.h"
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36 #include "hardware/structs/clocks.h"
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37 #pragma GCC diagnostic pop
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39 #include "dac.pio.h"
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40 #include "trigger.pio.h"
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41
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42 // https://github.com/howerj/q
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43 // Modified to be Q20.12 rather than Q16.16
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44 #include "q/q.h"
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45
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46 #include "shaped-trap.h"
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47
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48 // Pulse control bits
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49 #define SENSE 0x01
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50 #define GATE 0x02
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51 #define PHINV 0x04
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52 #define PACTIVE 0x08
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53
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54 // DMA channel to feed DAC PIO
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55 static int dma_chan;
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56 // Pulse shape data
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57 uint8_t pulse_data[65536];
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58 // Pulse control data
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59 uint8_t pulse_ctrl[65536];
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60 // PWM slice for PRF timer
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61 unsigned slice_num = 0;
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62 // DAC PIO
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63 PIO pulse_pio = pio0;
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64 // DAC SM
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65 uint pulse_sm;
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66 // Instruction offset for DAC PIO program
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67 uint pulse_pio_sm_offset;
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68 /*
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69 * Use a DMA channel to feed PIO0 SM0 with pulse data.
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70 * Each DMA transfer is a single pulse.
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71 *
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72 * The PIO state machine waits to be triggered before starting
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73 * so we can use another state machine to look for the trigger edge.
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74 *
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75 * When the DMA is done the IRQ handler will configure it for the next
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76 * pulse (or not if it should stop). ie reset the PIO state machine
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77 * back to waiting for an edge and re-arm the DMA.
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78 */
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79 void
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80 dma_handler(void) {
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81 // Clear the interrupt request.
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82 dma_hw->ints0 = 1u << dma_chan;
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83 }
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84
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85
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86 void
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87 pwm_wrap(void) {
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88 pwm_clear_irq(slice_num);
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89 #if 0
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90 static unsigned state = 0;
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91
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92 gpio_put(PICO_DEFAULT_LED_PIN, state);
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93 state = !state;
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94 #endif
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95
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96 // Reset DAQ PIO SM so it is waiting for a trigger
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97 pio_sm_exec(pulse_pio, pulse_sm, pio_encode_jmp(pulse_pio_sm_offset));
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98
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99 // Setup next pulse DMA address
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100 dma_channel_set_read_addr(dma_chan, pulse_data, true);
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101
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102 // Manually trigger DAQ SM (cleared by SM)
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103 pio0->irq_force = 1 << 0;
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104
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105 gpio_put(2, 1);
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106 gpio_put(2, 0);
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107 }
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108
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109 // Calculate pulse shape data
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110 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
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111 // Could encode them as bit stream like data but more compact would be
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112 // (say) a list of counts to toggle pins at
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113 // Need to add pre/postgate/sense/phase counters
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114 unsigned
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115 compute_pulse(uint8_t *data, uint8_t *ctrl, unsigned datalen, uint16_t plen, char *code, uint8_t ncode, const uint8_t *shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
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116 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
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117 q_t dcscale, stepsize;
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118 char tmps[20];
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119 interp_config cfg;
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120
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121 if (ncode == 1) {
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122 // Number of samples for half of the pulse
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123 // Do division first so we don't overflow Q16.16
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124 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
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125 // Number of samples for everything
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126 // XXX: Need the +1 otherwise slew2 is truncated
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127 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
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128 } else {
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129 shapesamples = plen / 2;
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130 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
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131 }
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132
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133 // Number of steps per samples in the pulse shape
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134 stepsize = qdiv(qint(shapelen), qint(shapesamples));
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135 qsprint(stepsize, tmps, sizeof(tmps));
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136 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
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137
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138 // Check the requested pulse will not overflow given data
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139 if (nsamples > datalen) {
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140 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
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141 return 0;
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142 }
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143 // Check it is not too short
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144 if (shapesamples < 2) {
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145 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
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146 return 0;
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147 }
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148 // Or too long (will overflow for loop variable)
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149 if (qtoi(shapesamples) > 65535) {
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150 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
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151 return 0;
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152 }
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153
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154 // Setup interp 0 lane 0 to generate index into shape table
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diff changeset
155 // Mask start is 0 because we use 8 bit samples
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diff changeset
156 cfg = interp_default_config();
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diff changeset
157 interp_config_set_shift(&cfg, QBITS);
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diff changeset
158 interp_config_set_mask(&cfg, 0, 32 - QBITS);
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diff changeset
159 interp_config_set_blend(&cfg, true);
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diff changeset
160 interp_set_config(interp0, 0, &cfg);
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parents: 6
diff changeset
161
8
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
162 // Setup interp 0 lane 1 to LERP each sample pair
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
163 cfg = interp_default_config();
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
164 interp_config_set_shift(&cfg, QBITS - 8);
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diff changeset
165 interp_config_set_signed(&cfg, false);
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diff changeset
166 interp_config_set_cross_input(&cfg, true); // unsigned blending
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diff changeset
167 interp_set_config(interp0, 1, &cfg);
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diff changeset
168
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
169 // Setup interp 1 lane 0 to clamp 0-255
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parents: 7
diff changeset
170 cfg = interp_default_config();
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diff changeset
171 interp_config_set_clamp(&cfg, true);
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diff changeset
172 interp_config_set_shift(&cfg, 0);
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diff changeset
173 interp_config_set_mask(&cfg, 0, 8);
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diff changeset
174 interp_config_set_signed(&cfg, false);
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diff changeset
175 interp_set_config(interp1, 0, &cfg);
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diff changeset
176 interp1->base[0] = 0;
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diff changeset
177 interp1->base[1] = 255;
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diff changeset
178
7
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diff changeset
179 interp0->accum[0] = 0; // Initial offset into shape table
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diff changeset
180 interp0->base[2] = (uintptr_t)shape; // Start of shape table
5
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diff changeset
181
8
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182 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
5
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183 qsprint(dcscale, tmps, sizeof(tmps));
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diff changeset
184 printf("dcscale = %s\n", tmps);
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185
8
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diff changeset
186 memset(pulse_data, 0, sizeof(pulse_data));
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187 memset(pulse_ctrl, 0, sizeof(pulse_ctrl));
5
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diff changeset
188 idx = 0;
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189
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diff changeset
190 // Up slew
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191 for (uint16_t i = 0; i < slew1; i++) {
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diff changeset
192 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
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193 ctrl[idx] |= PACTIVE;
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diff changeset
194 }
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diff changeset
195 for (uint16_t c = 0; c < ncode; c++) {
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
196 if (c == 0)
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diff changeset
197 bit1startup = idx;
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diff changeset
198
5
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diff changeset
199 uint ctrltmp = PACTIVE;
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diff changeset
200 if (code[c] == '0')
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diff changeset
201 ctrltmp |= PHINV;
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diff changeset
202
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diff changeset
203 // Pulse up
8
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
204 if (c == 0) {
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diff changeset
205 interp0->accum[0] = 0; // Initial offset into shape table
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diff changeset
206 interp0->base[2] = (uintptr_t)shape; // Start of shape table
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
207 }
5
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diff changeset
208 for (uint16_t i = 0; i < shapesamples; i++) {
8
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
209 if (c == 0) {
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diff changeset
210 // Get sample pair
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diff changeset
211 uint8_t *sample_pair = (uint8_t *) interp0->peek[2];
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
212 // Ask lane 1 for a LERP, using the lane 0 accumulator
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diff changeset
213 interp0->base[0] = sample_pair[0];
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
214 interp0->base[1] = sample_pair[1];
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
215 uint8_t peek = interp0->peek[1];
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diff changeset
216 // Apply DC offset scaling & clamp
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diff changeset
217 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
218 data[idx++] = interp1->peek[0];
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diff changeset
219 // Update interpolator for next point
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diff changeset
220 interp0->add_raw[0] = stepsize;
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diff changeset
221 } else
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
222 // Already done it before, just copy the previous instance
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diff changeset
223 data[idx++] = data[bit1startup + i];
5
Daniel O'Connor <darius@dons.net.au>
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diff changeset
224 ctrl[idx] = ctrltmp;
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diff changeset
225 }
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
226 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
227 bit1stopup = idx - 1;
5
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diff changeset
228 // Pulse down
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
229 // Since the pulse is symmetrical just copy the up slope in reverse
8
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
230 // XXX: if we had asymmetrical predistortion this wouldn't be true
5
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diff changeset
231 for (uint16_t i = 0; i < shapesamples; i++) {
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
232 data[idx++] = data[bit1stopup - i];
5
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diff changeset
233 // Could replace this with a separate loop to poke it into place
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diff changeset
234 // Similarly for TR switch when implemented
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diff changeset
235 if (i == 0 && c == 0)
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diff changeset
236 ctrl[idx] = ctrltmp | SENSE;
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diff changeset
237 else
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diff changeset
238 ctrl[idx] = ctrltmp;
Daniel O'Connor <darius@dons.net.au>
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diff changeset
239 }
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diff changeset
240
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diff changeset
241 // Code gap
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diff changeset
242 if (c < ncode - 1)
Daniel O'Connor <darius@dons.net.au>
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diff changeset
243 for (uint16_t i = 0; i < codegap; i++) {
Daniel O'Connor <darius@dons.net.au>
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diff changeset
244 data[idx++] = dcofs;
Daniel O'Connor <darius@dons.net.au>
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diff changeset
245 ctrl[idx] = ctrltmp;
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diff changeset
246 }
Daniel O'Connor <darius@dons.net.au>
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diff changeset
247 }
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diff changeset
248
Daniel O'Connor <darius@dons.net.au>
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diff changeset
249 // Down slew
8
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
250 for (uint16_t i = 0; i < slew2 + 1; i++) {
5
Daniel O'Connor <darius@dons.net.au>
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diff changeset
251 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
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diff changeset
252 ctrl[idx] |= PACTIVE;
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diff changeset
253 }
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diff changeset
254 return idx - 1;
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diff changeset
255 }
Daniel O'Connor <darius@dons.net.au>
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diff changeset
256
0
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
257 int
3
b10097c3383d DMA test data repeatedly into PIO FIFO
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diff changeset
258 main(void) {
5
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diff changeset
259 absolute_time_t then, now;
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diff changeset
260
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diff changeset
261 // Set sysclk to 120MHz
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diff changeset
262 set_sys_clock_khz(120000, true);
0
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
263
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
264 stdio_init_all();
5
Daniel O'Connor <darius@dons.net.au>
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diff changeset
265 printf("\n\n\nIniting\n");
0
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
266
5
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diff changeset
267 // Needed otherwise timer related functions hang under debugging
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diff changeset
268 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
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parents: 3
diff changeset
269 timer_hw->dbgpause = 0;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
270
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
271 gpio_init(PICO_DEFAULT_LED_PIN);
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parents: 3
diff changeset
272 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
9
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
273 gpio_init(2);
3acdebd7eec7 Make it actually work
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diff changeset
274 gpio_set_dir(2, GPIO_OUT);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
275 #if 0
3acdebd7eec7 Make it actually work
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diff changeset
276 for (unsigned i = 7; i < 7 + 9; i++) {
3acdebd7eec7 Make it actually work
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diff changeset
277 printf("GPIO %d\n", i);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
278 gpio_init(i);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
279 gpio_set_dir(i, GPIO_OUT);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
280 printf("on\n");
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
281 gpio_put(i, 1);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
282 __breakpoint();
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
283 printf("off\n");
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
284 gpio_put(i, 0);
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
285 __breakpoint();
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
286 }
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
287 #endif
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
288
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diff changeset
289 uint32_t idx;
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
290 uint16_t plen;
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
291 char *code;
9
3acdebd7eec7 Make it actually work
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parents: 8
diff changeset
292 if (1) {
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
293 plen = 8000;
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
294 code = "1110010";
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
295 } else {
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
296 plen = 53000;
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
297 code = "1";
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
298 }
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
299
5
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
300 uint8_t codegap = 4;
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parents: 3
diff changeset
301 uint8_t slew1 = 10;
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parents: 3
diff changeset
302 uint8_t slew2 = 10;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
303 uint8_t dcofs = 110;
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parents: 3
diff changeset
304 then = get_absolute_time();
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parents: 3
diff changeset
305 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
306 plen, code, strlen(code),
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
307 shaped_trap, sizeof(shaped_trap),
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
308 codegap, slew1, slew2, dcofs)) == 0) {
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
309 printf("Failed to compute pulse\n");
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
310 while (1)
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parents: 3
diff changeset
311 ;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
312 }
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parents: 3
diff changeset
313 now = get_absolute_time();
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
314 unsigned long long diff = absolute_time_diff_us(then, now);
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
315 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
316 diff, idx, (float)diff * 1000.0 / idx);
10
98880b18bcc1 Reset DAC PIO and use force trigger to do manual trigger.
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parents: 9
diff changeset
317 //__breakpoint();
9
3acdebd7eec7 Make it actually work
Daniel O'Connor <darius@dons.net.au>
parents: 8
diff changeset
318
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319 // Load the clocked_input program, and configure a free state machine
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320 // to run the program.
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321 pulse_pio_sm_offset = pio_add_program(pulse_pio, &dac_program);
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322 uint pulse_sm = pio_claim_unused_sm(pulse_pio, true);
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323 // Data is GPIO7 to GPIO14, clock is GPIO15
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324 // Clock divisor of 2 so it runs at 60MHz and
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325 // generates a 30MHz clock
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326 dac_program_init(pulse_pio, pulse_sm, pulse_pio_sm_offset, 7, 2);
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327
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328 // Configure a channel to write 32 bits at a time to PIO0
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329 // SM0's TX FIFO, paced by the data request signal from that peripheral.
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330 dma_chan = dma_claim_unused_channel(true);
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331 dma_channel_config dmac = dma_channel_get_default_config(dma_chan);
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332 channel_config_set_transfer_data_size(&dmac, DMA_SIZE_32);
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333 channel_config_set_read_increment(&dmac, true);
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334 channel_config_set_dreq(&dmac, DREQ_PIO0_TX0);
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335
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336 dma_channel_configure(
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337 dma_chan,
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338 &dmac,
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339 &pio0_hw->txf[0], // Write address (only need to set this once)
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340 NULL, // Don't provide a read address yet
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341 (idx + 1) >> 2, // Transfer count (round up to 4 bytes)
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342 false // Don't start yet
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343 );
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344
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345 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
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346 dma_channel_set_irq0_enabled(dma_chan, true);
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347
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348 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
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349 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
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350 irq_set_enabled(DMA_IRQ_0, true);
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351
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352 // 120MHz / 250 = 480kHz base
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353 // Maximum divisor is only 256 which limits the low end,
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354 // could further subdivide in the IRQ handler
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355 pwm_config c = pwm_get_default_config();
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356 pwm_config_set_clkdiv_int(&c, 250);
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357 // 8Hz
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358 pwm_config_set_wrap(&c, 60000 - 1);
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359 pwm_init(slice_num, &c, true);
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360 pwm_clear_irq(slice_num);
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361 pwm_set_irq_enabled(slice_num, true);
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362 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
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363 irq_set_enabled(PWM_IRQ_WRAP, true);
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364 pwm_init(slice_num, &c, true);
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365
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366 // Everything else from this point is interrupt-driven. The processor has
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367 // time to sit and think about its early retirement -- maybe open a bakery?
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368 while (true) {
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369 dma_channel_wait_for_finish_blocking(dma_chan);
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370 gpio_put(PICO_DEFAULT_LED_PIN, 1);
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371 sleep_ms(100);
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372 gpio_put(PICO_DEFAULT_LED_PIN, 0);
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373 sleep_ms(100);
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374 }
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375
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376 __breakpoint();
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377 }