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annotate fifo.veo @ 2:14f09db71ed7

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Added tag GSOFT-MEMEC-1-REL for changeset f88da01700da
author darius@midget.dons.net.au
date Tue, 23 Oct 2007 10:08:35 +0930
parents f88da01700da
children
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f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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1 /*******************************************************************************
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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2 * This file is owned and controlled by Xilinx and must be used *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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3 * solely for design, simulation, implementation and creation of *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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4 * design files limited to Xilinx devices or technologies. Use *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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5 * with non-Xilinx devices or technologies is expressly prohibited *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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6 * and immediately terminates your license. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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7 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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8 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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9 * SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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10 * XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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11 * AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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12 * OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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13 * IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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14 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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15 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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16 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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17 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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18 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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19 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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20 * FOR A PARTICULAR PURPOSE. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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21 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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22 * Xilinx products are not intended for use in life support *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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23 * appliances, devices, or systems. Use in such applications are *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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24 * expressly prohibited. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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25 * *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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26 * (c) Copyright 1995-2006 Xilinx, Inc. *
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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27 * All rights reserved. *
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28 *******************************************************************************/
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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29 // The following must be inserted into your Verilog file for this
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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30 // core to be instantiated. Change the instance name and port connections
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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31 // (in parentheses) to your own signal names.
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32
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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33 //----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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34 fifo YourInstanceName (
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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35 .din(din),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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36 .wr_en(wr_en),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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37 .wr_clk(wr_clk),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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38 .rd_en(rd_en),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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39 .rd_clk(rd_clk),
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40 .ainit(ainit),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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41 .dout(dout),
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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42 .full(full),
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43 .empty(empty));
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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44
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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45 // INST_TAG_END ------ End INSTANTIATION Template ---------
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46
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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47 // You must compile the wrapper file fifo.v when simulating
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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48 // the core, fifo. When compiling the wrapper file, be sure to
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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49 // reference the XilinxCoreLib Verilog simulation library. For detailed
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
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50 // instructions, please refer to the "CORE Generator Help".
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51