Mercurial > ~darius > hgwebdir.cgi > tempctrl
comparison 1wire.c @ 8:f9a085a0ba93
Change the 1 wire routines to mostly C with assembly delay routines
for ease of portability.
author | darius |
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date | Mon, 12 Jul 2004 17:50:42 +0930 |
parents | ffeab3c04e83 |
children | eb1faf51968e |
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7:a940431af6f5 | 8:f9a085a0ba93 |
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1 /* | 1 /* |
2 * Various 1 wire routines | 2 * Various 1 wire routines |
3 * Search routine is copied from the Dallas owpd library with mods. | 3 * Search routine is copied from the Dallas owpd library with mods. |
4 * | |
5 * $Id$ | |
4 * | 6 * |
5 * Copyright (c) 2004 | 7 * Copyright (c) 2004 |
6 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | 8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. |
7 * | 9 * |
8 * Redistribution and use in source and binary forms, with or without | 10 * Redistribution and use in source and binary forms, with or without |
30 #include <stdio.h> | 32 #include <stdio.h> |
31 #include <avr/io.h> | 33 #include <avr/io.h> |
32 #include <avr/pgmspace.h> | 34 #include <avr/pgmspace.h> |
33 | 35 |
34 #include "1wire.h" | 36 #include "1wire.h" |
37 #include "1wire-delay.h" | |
35 | 38 |
36 void uart_putsP(const char *addr); | 39 void uart_putsP(const char *addr); |
37 void uart_puts(const char *addr); | 40 void uart_puts(const char *addr); |
38 void uart_getc(); | 41 void uart_getc(); |
39 int uart_putc(char c); | 42 int uart_putc(char c); |
135 */ | 138 */ |
136 void | 139 void |
137 OWWriteBit(int bit) { | 140 OWWriteBit(int bit) { |
138 OWdelay(); | 141 OWdelay(); |
139 if (bit) { | 142 if (bit) { |
140 asm volatile ( | 143 OWIREOUTPORT &= ~(_BV(OWIREOUTPIN)); |
141 /* Drive bus low */ | 144 OWIREDDR |= _BV(OWIREOUTPIN); |
142 "cbi %[out], %[pin]\n\t" | 145 DELAY_A; |
143 "sbi %[ddr], %[pin]\n\t" | 146 OWIREDDR &= ~(_BV(OWIREOUTPIN)); |
144 /* Delay A (6 usec) */ | 147 DELAY_B; |
145 "ldi r21, 1\n\t" | |
146 "loopA:\n\t" | |
147 "nop\n\t" | |
148 "dec r21\n\t" | |
149 "brne loopA\n\t" | |
150 /* Release bus */ | |
151 "cbi %[ddr], %[pin]\n\t" | |
152 /* Delay B (64 usec) */ | |
153 "ldi r21, 32\n\t" | |
154 "loopB:\n\t" | |
155 "nop\n\t" | |
156 "nop\n\t" | |
157 "nop\n\t" | |
158 "nop\n\t" | |
159 "nop\n\t" | |
160 "dec r21\n\t" | |
161 "brne loopB\n\t" | |
162 : /* Outputs */ | |
163 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */ | |
164 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)), | |
165 [pin] "I" (OWIREOUTPIN) | |
166 : "r21"); /* Clobbers */ | |
167 } else { | 148 } else { |
168 asm volatile ( | 149 OWIREOUTPORT &= ~(_BV(OWIREOUTPIN)); |
169 /* Drive bus low */ | 150 OWIREDDR |= _BV(OWIREOUTPIN); |
170 "cbi %[out], %[pin]\n\t" | 151 DELAY_C; |
171 "sbi %[ddr], %[pin]\n\t" | 152 OWIREDDR &= ~(_BV(OWIREOUTPIN)); |
172 /* Delay C (60 usec) */ | 153 DELAY_D; |
173 "ldi r21, 30\n\t" | |
174 "loopC:\n\t" | |
175 "nop\n\t" | |
176 "nop\n\t" | |
177 "nop\n\t" | |
178 "nop\n\t" | |
179 "nop\n\t" | |
180 "dec r21\n\t" | |
181 "brne loopC\n\t" | |
182 /* Release bus */ | |
183 "cbi %[ddr], %[pin]\n\t" | |
184 /* Delay D (10 usec) */ | |
185 "ldi r21, 9\n\t" | |
186 "loopD:\n\t" | |
187 "nop\n\t" | |
188 "dec r21\n\t" | |
189 "brne loopD\n\t" | |
190 : /* Outputs */ | |
191 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */ | |
192 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)), | |
193 [pin] "I" (OWIREOUTPIN) | |
194 : "r21"); /* Clobbers */ | |
195 } | 154 } |
196 } | 155 } |
197 | 156 |
198 /*----------------------------------------------------------------------------- | 157 /*----------------------------------------------------------------------------- |
199 * Read a bit from the 1-wire bus and return it. | 158 * Read a bit from the 1-wire bus and return it. |
200 */ | 159 */ |
201 int | 160 int |
202 OWReadBit(void) { | 161 OWReadBit(void) { |
203 uint8_t result; | |
204 | |
205 OWdelay(); | 162 OWdelay(); |
206 | 163 |
207 asm volatile ( | 164 OWIREOUTPORT &= ~(_BV(OWIREOUTPIN)); |
208 /* Drive bus low */ | 165 OWIREDDR |= _BV(OWIREOUTPIN); |
209 "cbi %[out], %[opin]\n\t" | 166 DELAY_A; |
210 "sbi %[ddr], %[opin]\n\t" | 167 OWIREDDR &= ~(_BV(OWIREOUTPIN)); |
211 /* Delay A (6 usec) */ | 168 DELAY_E; |
212 "ldi r21, 1\n\t" | 169 return(OWIREINPORT & _BV(OWIREINPIN) ? 1 : 0); |
213 "loopA1:\n\t" | |
214 "dec r21\n\t" | |
215 "brne loopA1\n\t" | |
216 /* Release bus */ | |
217 "cbi %[ddr], %[opin]\n\t" | |
218 /* Delay E (9 usec) */ | |
219 "ldi r21, 8\n\t" | |
220 "loopE:\n\t" | |
221 "nop\n\t" | |
222 "dec r21\n\t" | |
223 "brne loopE\n\t" | |
224 /* Sample */ | |
225 "ldi %[res], 0\n\t" | |
226 "sbic %[in], %[ipin]\n\t" | |
227 "ldi %[res], 1\n\t" | |
228 | |
229 /* Delay F (55 usec) */ | |
230 "ldi r21, 27\n\t" | |
231 "loopF:\n\t" | |
232 "nop\n\t" | |
233 "nop\n\t" | |
234 "nop\n\t" | |
235 "nop\n\t" | |
236 "nop\n\t" | |
237 "nop\n\t" | |
238 "nop\n\t" | |
239 "nop\n\t" | |
240 "nop\n\t" | |
241 "nop\n\t" | |
242 "nop\n\t" | |
243 "nop\n\t" | |
244 "nop\n\t" | |
245 "dec r21\n\t" | |
246 "brne loopF\n\t" | |
247 | |
248 : [res] "=r" (result) /* Outputs */ | |
249 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */ | |
250 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)), | |
251 [opin] "I" (OWIREOUTPIN), | |
252 [in] "I" (_SFR_IO_ADDR(OWIREINPORT)), | |
253 [ipin] "I" (OWIREINPIN) | |
254 : "r21"); /* Clobbers */ | |
255 | |
256 return(result); | |
257 } | 170 } |
258 | 171 |
259 /*----------------------------------------------------------------------------- | 172 /*----------------------------------------------------------------------------- |
260 * Write a byte to the 1-wire bus | 173 * Write a byte to the 1-wire bus |
261 */ | 174 */ |