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comparison 1wire-delay.h @ 8:f9a085a0ba93

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Change the 1 wire routines to mostly C with assembly delay routines for ease of portability.
author darius
date Mon, 12 Jul 2004 17:50:42 +0930
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children eb1faf51968e
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7:a940431af6f5 8:f9a085a0ba93
1 /*
2 * Delay routines for the 1 wire bus
3 * Search routine is copied from the Dallas owpd library with mods.
4 *
5 * $Id$
6 *
7 * Copyright (c) 2004
8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 /*
33 * Note that all these routines are clock speed sensitive!
34 * (4Mhz AT908515)
35 */
36
37 #if (XTAL_CPU == 4000000)
38 /* 6 usec */
39 #define DELAY_A asm volatile( \
40 "ldi r21, 6\n\t" \
41 "L_%=: nop\n\t" \
42 "dec r21\n\t" \
43 "brne L_%=\n\t" \
44 ::: "r21");
45
46 /* 64 usec */
47 #define DELAY_B asm volatile( \
48 "ldi r21, 32\n\t" \
49 "L_%=: nop\n\t" \
50 "nop\n\t" \
51 "nop\n\t" \
52 "nop\n\t" \
53 "nop\n\t" \
54 "dec r21\n\t" \
55 "brne L_%=\n\t" \
56 ::: "r21");
57
58 /* 60 usec */
59 #define DELAY_C asm volatile( \
60 "ldi r21, 30\n\t" \
61 "L_%=: nop\n\t" \
62 "nop\n\t" \
63 "nop\n\t" \
64 "nop\n\t" \
65 "nop\n\t" \
66 "dec r21\n\t" \
67 "brne L_%=\n\t" \
68 ::: "r21");
69
70 /* 10 usec */
71 #define DELAY_D asm volatile( \
72 "ldi r21, 9\n\t" \
73 "L_%=: nop\n\t" \
74 "dec r21\n\t" \
75 "brne L_%=\n\t" \
76 ::: "r21");
77
78 /* 9 usec */
79 #define DELAY_E asm volatile( \
80 "ldi r21, 8\n\t" \
81 "L_%=: nop\n\t" \
82 "dec r21\n\t" \
83 "brne L_%=\n\t" \
84 ::: "r21");
85
86 /* 55 usec */
87 #define DELAY_F asm volatile( \
88 "ldi r21, 27\n\t" \
89 "L_%=: nop\n\t" \
90 "nop\n\t" \
91 "nop\n\t" \
92 "nop\n\t" \
93 "nop\n\t" \
94 "nop\n\t" \
95 "nop\n\t" \
96 "nop\n\t" \
97 "nop\n\t" \
98 "nop\n\t" \
99 "nop\n\t" \
100 "nop\n\t" \
101 "nop\n\t" \
102 "dec r21\n\t" \
103 "brne L_%=\n\t" \
104 ::: "r21");
105
106 /* 0 usec */
107 #define DELAY_G
108
109 /* 480 usec */
110 #define DELAY_H asm volatile( \
111 "ldi r21, 120\n\t" \
112 "L_%=: nop\n\t" \
113 "nop\n\t" \
114 "nop\n\t" \
115 "nop\n\t" \
116 "nop\n\t" \
117 "nop\n\t" \
118 "nop\n\t" \
119 "nop\n\t" \
120 "nop\n\t" \
121 "nop\n\t" \
122 "nop\n\t" \
123 "nop\n\t" \
124 "nop\n\t" \
125 "dec r21\n\t" \
126 "brne L_%=\n\t" \
127 ::: "r21");
128
129 /* 70 usec */
130 #define DELAY_I asm volatile( \
131 "ldi r21, 35\n\t" \
132 "L_%=: nop\n\t" \
133 "nop\n\t" \
134 "nop\n\t" \
135 "nop\n\t" \
136 "nop\n\t" \
137 "dec r21\n\t" \
138 "brne L_%=\n\t" \
139 ::: "r21");
140 #else
141 #error No 1 wire delay routines for selected clock speed
142 #endif
143