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comparison 1wire-config.h @ 32:b0cb873c0206

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Isolate the bus frobbing parts and the delays into a separate header. This means the user only has to edit a single file to suit their situation and allows the code to work with active drive systems as well as passive pullups (ie 1 vs 2 IO pins)
author darius
date Sun, 23 Apr 2006 22:57:16 +0930
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children 0aa6bf4b98ae
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31:4e417d84365e 32:b0cb873c0206
1 /*
2 * 1 wire header
3 *
4 * This is the user servicable stuff - how to do delays and how to
5 * frob the IO pins.
6 *
7 * $Id$
8 *
9 * Copyright (c) 2004
10 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 /*
35 * Alter these for your configuration
36 */
37
38 /* Set DDR on the right pins */
39 #define OWBUSINIT() do { \
40 DDRD |= _BV(4); \
41 DDRD &= ~_BV(3); \
42 } while (0)
43
44 /* Read the 1-wire bus, non-inverting logic */
45 #define OWREADBUS() (PIND & _BV(3) ? 1 : 0)
46
47 /* Set the 1-wire bus to 0
48 * Turns a transistor on to pull it low
49 */
50 #define OWSETBUSLOW() PORTD |= _BV(4)
51
52 /* Set the 1-wire bus to 1
53 * Turn the transistor off to let the pullup do its job
54 */
55 #define OWSETBUSHIGH() PORTD &= ~_BV(4)
56
57 /* _delay_us can only do a delay of 768/clock_freq */
58 #if F_CPU > 16000000
59 #error F_CPU > 16MHz, delays need adjusting
60 #endif
61
62 #define OWDELAY_A _delay_us(6) /* 6 usec */
63 #define OWDELAY_B do { _delay_us(48); _delay_us(16); } while (0) /* 64 usec */
64 #define OWDELAY_C do { _delay_us(48); _delay_us(12); } while (0) /* 60 usec */
65 #define OWDELAY_D _delay_us(10) /* 10 usec */
66 #define OWDELAY_E _delay_us(9) /* 9 usec */
67 #define OWDELAY_F do { _delay_us(55); } while (0) /* 55 usec */
68 #define OWDELAY_G /* 0 usec */
69 #define OWDELAY_H do { _delay_us(48); _delay_us(48); _delay_us(48); \
70 _delay_us(48); _delay_us(48); _delay_us(48); _delay_us(48); \
71 _delay_us(48);_delay_us(48); _delay_us(48); } while (0) /* 480 usec */
72 #define OWDELAY_I do { _delay_us(48); _delay_us(22); } while (0) /* 70 usec */