annotate 1wire.c @ 0:ffeab3c04e83

Initial revision
author darius
date Sun, 11 Jul 2004 00:45:50 +0930
parents
children f9a085a0ba93
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
1 /*
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
2 * Various 1 wire routines
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
3 * Search routine is copied from the Dallas owpd library with mods.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
4 *
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
5 * Copyright (c) 2004
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
6 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
7 *
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
8 * Redistribution and use in source and binary forms, with or without
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
9 * modification, are permitted provided that the following conditions
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
10 * are met:
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
11 * 1. Redistributions of source code must retain the above copyright
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
12 * notice, this list of conditions and the following disclaimer.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
13 * 2. Redistributions in binary form must reproduce the above copyright
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
14 * notice, this list of conditions and the following disclaimer in the
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
15 * documentation and/or other materials provided with the distribution.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
16 *
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
27 * SUCH DAMAGE.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
28 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
29
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
30 #include <stdio.h>
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
31 #include <avr/io.h>
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
32 #include <avr/pgmspace.h>
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
33
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
34 #include "1wire.h"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
35
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
36 void uart_putsP(const char *addr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
37 void uart_puts(const char *addr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
38 void uart_getc();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
39 int uart_putc(char c);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
40
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
41 static uint8_t OW_LastDevice = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
42 static uint8_t OW_LastDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
43 static uint8_t OW_LastFamilyDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
44
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
45 static void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
46 OWdelay(void) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
47 asm volatile (
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
48 "ldi r21, 50\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
49 "_OWdelay:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
50 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
51 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
52 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
53 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
54 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
55 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
56 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
57 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
58 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
59 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
60 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
61 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
62 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
63 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
64 "brne _OWdelay\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
65 ::: "r21");
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
66 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
67
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
68 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
69 * Generate a 1-Wire reset, return 1 if no presence detect was found,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
70 * return 0 otherwise.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
71 * (NOTE: Does not handle alarm presence from DS2404/DS1994)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
72 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
73 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
74 OWTouchReset(void) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
75 uint8_t result;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
76
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
77 asm volatile (
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
78 /* Delay G (0 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
79 "\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
80 /* Drive bus low */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
81 "cbi %[out], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
82 "sbi %[ddr], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
83 /* Delay H (480 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
84 "ldi r21, 120\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
85 "loopH:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
86 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
87 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
88 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
89 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
90 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
91 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
92 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
93 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
94 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
95 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
96 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
97 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
98 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
99 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
100 "brne loopH\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
101 /* Release bus */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
102 "cbi %[ddr], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
103 /* Delay I (70 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
104 "ldi r21, 35\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
105 "loopI:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
106 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
107 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
108 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
109 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
110 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
111 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
112 "brne loopI\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
113 /* Sample for presense */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
114 "ldi %[result], 0\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
115 "sbi %[ddr], 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
116 "sbi %[out], 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
117 /* 1 == no presence */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
118 "sbic %[in], %[ipin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
119 "ldi %[result], 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
120 "cbi %[out], 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
121
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
122 : [result] "=r" (result) /* Outputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
123 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
124 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
125 [opin] "I" (OWIREOUTPIN),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
126 [in] "I" (_SFR_IO_ADDR(OWIREINPORT)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
127 [ipin] "I" (OWIREINPIN)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
128 : "r21"); /* Clobbers */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
129
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
130 return(result);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
131 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
132
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
133 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
134 * Send a 1-wire write bit.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
135 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
136 void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
137 OWWriteBit(int bit) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
138 OWdelay();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
139 if (bit) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
140 asm volatile (
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
141 /* Drive bus low */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
142 "cbi %[out], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
143 "sbi %[ddr], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
144 /* Delay A (6 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
145 "ldi r21, 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
146 "loopA:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
147 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
148 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
149 "brne loopA\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
150 /* Release bus */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
151 "cbi %[ddr], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
152 /* Delay B (64 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
153 "ldi r21, 32\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
154 "loopB:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
155 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
156 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
157 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
158 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
159 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
160 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
161 "brne loopB\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
162 : /* Outputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
163 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
164 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
165 [pin] "I" (OWIREOUTPIN)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
166 : "r21"); /* Clobbers */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
167 } else {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
168 asm volatile (
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
169 /* Drive bus low */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
170 "cbi %[out], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
171 "sbi %[ddr], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
172 /* Delay C (60 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
173 "ldi r21, 30\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
174 "loopC:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
175 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
176 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
177 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
178 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
179 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
180 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
181 "brne loopC\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
182 /* Release bus */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
183 "cbi %[ddr], %[pin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
184 /* Delay D (10 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
185 "ldi r21, 9\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
186 "loopD:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
187 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
188 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
189 "brne loopD\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
190 : /* Outputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
191 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
192 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
193 [pin] "I" (OWIREOUTPIN)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
194 : "r21"); /* Clobbers */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
195 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
196 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
197
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
198 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
199 * Read a bit from the 1-wire bus and return it.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
200 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
201 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
202 OWReadBit(void) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
203 uint8_t result;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
204
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
205 OWdelay();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
206
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
207 asm volatile (
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
208 /* Drive bus low */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
209 "cbi %[out], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
210 "sbi %[ddr], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
211 /* Delay A (6 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
212 "ldi r21, 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
213 "loopA1:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
214 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
215 "brne loopA1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
216 /* Release bus */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
217 "cbi %[ddr], %[opin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
218 /* Delay E (9 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
219 "ldi r21, 8\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
220 "loopE:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
221 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
222 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
223 "brne loopE\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
224 /* Sample */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
225 "ldi %[res], 0\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
226 "sbic %[in], %[ipin]\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
227 "ldi %[res], 1\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
228
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
229 /* Delay F (55 usec) */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
230 "ldi r21, 27\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
231 "loopF:\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
232 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
233 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
234 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
235 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
236 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
237 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
238 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
239 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
240 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
241 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
242 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
243 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
244 "nop\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
245 "dec r21\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
246 "brne loopF\n\t"
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
247
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
248 : [res] "=r" (result) /* Outputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
249 : [out] "I" (_SFR_IO_ADDR(OWIREOUTPORT)), /* Inputs */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
250 [ddr] "I" (_SFR_IO_ADDR(OWIREDDR)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
251 [opin] "I" (OWIREOUTPIN),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
252 [in] "I" (_SFR_IO_ADDR(OWIREINPORT)),
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
253 [ipin] "I" (OWIREINPIN)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
254 : "r21"); /* Clobbers */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
255
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
256 return(result);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
257 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
258
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
259 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
260 * Write a byte to the 1-wire bus
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
261 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
262 void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
263 OWWriteByte(uint8_t data) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
264 int i;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
265
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
266 /* Send LSB first */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
267 for (i = 0; i < 8; i++) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
268 OWWriteBit(data & 0x01);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
269 data >>= 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
270 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
271 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
272
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
273 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
274 * Read a byte from the 1-wire bus
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
275 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
276 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
277 OWReadByte(void) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
278 int i, result = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
279
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
280 for (i = 0; i < 8; i++) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
281 result >>= 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
282 if (OWReadBit())
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
283 result |= 0x80;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
284 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
285 return(result);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
286 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
287
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
288 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
289 * Write a 1-wire data byte and return the sampled result.
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
290 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
291 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
292 OWTouchByte(uint8_t data) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
293 int i, result = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
294
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
295 for (i = 0; i < 8; i++) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
296 result >>= 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
297
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
298 /* If sending a 1 then read a bit, otherwise write a 0 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
299 if (data & 0x01) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
300 if (OWReadBit())
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
301 result |= 0x80;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
302 } else
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
303 OWWriteBit(0);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
304
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
305 data >>= 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
306 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
307
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
308 return(result);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
309 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
310
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
311 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
312 * Write a block of bytes to the 1-wire bus and return the sampled result in
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
313 * the same buffer
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
314 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
315 void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
316 OWBlock(uint8_t *data, int len) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
317 int i;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
318
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
319 for (i = 0; i < len; i++)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
320 data[i] = OWTouchByte(data[i]);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
321 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
322
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
323
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
324 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
325 * Send a 1 wire command to a device, or all if no ROM ID provided
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
326 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
327 void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
328 OWSendCmd(uint8_t *ROM, uint8_t cmd) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
329 int i;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
330
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
331 OWTouchReset();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
332
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
333 if (ROM == NULL)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
334 OWWriteByte(OW_SKIP_ROM_CMD);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
335 else {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
336 OWWriteByte(OW_MATCH_ROM_CMD);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
337 for (i = 0; i < 8; i++)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
338 OWWriteByte(ROM[i]);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
339 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
340
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
341 OWWriteByte(cmd);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
342 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
343
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
344 /*-----------------------------------------------------------------------------
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
345 * Search algorithm from App note 187 (and 162)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
346 *
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
347 * Returns 1 when something is found, 0 if nothing present
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
348 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
349 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
350 OWFirst(uint8_t *ROM, uint8_t do_reset, uint8_t alarm_only) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
351 /* Reset state */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
352 OW_LastDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
353 OW_LastDevice = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
354 OW_LastFamilyDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
355
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
356 /* Go looking */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
357 return (OWNext(ROM, do_reset, alarm_only));
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
358 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
359
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
360 /* Returns 1 when something is found, 0 if nothing left */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
361 int
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
362 OWNext(uint8_t *ROM, uint8_t do_reset, uint8_t alarm_only) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
363 uint8_t bit_test, search_direction, bit_number;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
364 uint8_t last_zero, rom_byte_number, next_result;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
365 uint8_t rom_byte_mask;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
366 uint8_t lastcrc8, crcaccum;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
367 char errstr[30];
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
368
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
369 /* Init for search */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
370 bit_number = 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
371 last_zero = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
372 rom_byte_number = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
373 rom_byte_mask = 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
374 next_result = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
375 lastcrc8 = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
376 crcaccum = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
377
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
378 /* if the last call was not the last one */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
379 if (!OW_LastDevice) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
380 /* check if reset first is requested */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
381 if (do_reset) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
382 /* reset the 1-wire
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
383 * if there are no parts on 1-wire, return 0 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
384 #if OW_DEBUG
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
385 uart_putsP(PSTR("Resetting\n\r"));
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
386 #endif
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
387 if (OWTouchReset()) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
388 /* reset the search */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
389 OW_LastDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
390 OW_LastFamilyDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
391 #if OW_DEBUG
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
392 uart_putsP(PSTR("No devices on bus\n\r"));
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
393 #endif
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
394 return 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
395 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
396 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
397
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
398 /* If finding alarming devices issue a different command */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
399 if (alarm_only)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
400 OWWriteByte(OW_SEARCH_ALRM_CMD); /* issue the alarming search command */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
401 else
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
402 OWWriteByte(OW_SEARCH_ROM_CMD); /* issue the search command */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
403
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
404 /* pause before beginning the search */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
405 OWdelay();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
406 OWdelay();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
407 OWdelay();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
408
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
409 /* loop to do the search */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
410 do {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
411 /* read a bit and its compliment */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
412 bit_test = OWReadBit() << 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
413 bit_test |= OWReadBit();
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
414
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
415 #if OW_DEBUG
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
416 sprintf_P(errstr, PSTR("bit_test = %d\n\r"), bit_test);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
417 uart_puts(errstr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
418 #endif
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
419
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
420 /* check for no devices on 1-wire */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
421 if (bit_test == 3) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
422 sprintf_P(errstr, PSTR("bit_test = %d\n\r"), bit_test);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
423 uart_puts(errstr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
424 break;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
425 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
426 else {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
427 /* all devices coupled have 0 or 1 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
428 if (bit_test > 0)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
429 search_direction = !(bit_test & 0x01); /* bit write value for search */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
430 else {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
431 /* if this discrepancy is before the Last Discrepancy
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
432 * on a previous OWNext then pick the same as last time */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
433 if (bit_number < OW_LastDiscrepancy)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
434 search_direction = ((ROM[rom_byte_number] & rom_byte_mask) > 0);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
435 else
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
436 /* if equal to last pick 1, if not then pick 0 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
437 search_direction = (bit_number == OW_LastDiscrepancy);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
438
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
439 /* if 0 was picked then record its position in LastZero */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
440 if (search_direction == 0) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
441 last_zero = bit_number;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
442
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
443 /* check for Last discrepancy in family */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
444 if (last_zero < 9)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
445 OW_LastFamilyDiscrepancy = last_zero;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
446 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
447 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
448
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
449 /* set or clear the bit in the ROM byte rom_byte_number
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
450 * with mask rom_byte_mask */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
451 if (search_direction == 1)
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
452 ROM[rom_byte_number] |= rom_byte_mask;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
453 else
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
454 ROM[rom_byte_number] &= ~rom_byte_mask;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
455
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
456 /* serial number search direction write bit */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
457 OWWriteBit(search_direction);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
458
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
459 /* increment the byte counter bit_number
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
460 * and shift the mask rom_byte_mask */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
461 bit_number++;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
462 rom_byte_mask <<= 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
463
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
464 /* if the mask is 0 then go to new ROM byte rom_byte_number
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
465 * and reset mask */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
466 if (rom_byte_mask == 0) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
467 OWCRC(ROM[rom_byte_number], &crcaccum); /* accumulate the CRC */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
468 lastcrc8 = crcaccum;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
469
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
470 rom_byte_number++;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
471 rom_byte_mask = 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
472 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
473 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
474 } while (rom_byte_number < 8); /* loop until through all ROM bytes 0-7 */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
475
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
476 /* if the search was successful then */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
477 if (!(bit_number < 65) || lastcrc8) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
478 if (lastcrc8) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
479 sprintf_P(errstr, PSTR("Bad CRC (%d)\n\r"), lastcrc8);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
480 uart_puts(errstr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
481 next_result = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
482 } else {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
483 /* search successful so set LastDiscrepancy,LastDevice,next_result */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
484 OW_LastDiscrepancy = last_zero;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
485 OW_LastDevice = (OW_LastDiscrepancy == 0);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
486 #if OW_DEBUG
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
487 sprintf_P(errstr, PSTR("Last device = %d\n\r"), OW_LastDevice);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
488 uart_puts(errstr);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
489 #endif
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
490 next_result = 1;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
491 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
492 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
493 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
494
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
495 /* if no device found then reset counters so next 'next' will be
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
496 * like a first */
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
497 if (!next_result || !ROM[0]) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
498 OW_LastDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
499 OW_LastDevice = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
500 OW_LastFamilyDiscrepancy = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
501 next_result = 0;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
502 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
503
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
504 return next_result;
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
505
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
506 }
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
507
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
508 uint8_t PROGMEM dscrc_table[] = {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
509 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
510 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
511 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
512 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
513 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
514 219, 133,103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
515 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
516 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
517 140,210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113,147, 205,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
518 17, 79, 173, 243, 112, 46, 204, 146, 211,141, 111, 49, 178, 236, 14, 80,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
519 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82,176, 238,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
520 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
521 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
522 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
523 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
524 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
525 };
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
526
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
527 void
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
528 OWCRC(uint8_t x, uint8_t *crc) {
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
529 *crc = pgm_read_byte(&dscrc_table[(*crc) ^ x]);
ffeab3c04e83 Initial revision
darius
parents:
diff changeset
530 }