Mercurial > ~darius > hgwebdir.cgi > tempctrl
annotate testavr.c @ 39:599d013ce3f2
Use parallel programmer.
| author | darius |
|---|---|
| date | Fri, 23 Nov 2007 12:02:22 +1030 |
| parents | 0a148f362097 |
| children | 5898fba6593c |
| rev | line source |
|---|---|
| 0 | 1 /* |
|
9
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
2 * Test various AVR bits and pieces |
|
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
3 * |
|
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
4 * $Id$ |
|
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
5 * |
| 0 | 6 * Copyright (c) 2004 |
| 7 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | |
| 8 * | |
| 9 * Redistribution and use in source and binary forms, with or without | |
| 10 * modification, are permitted provided that the following conditions | |
| 11 * are met: | |
| 12 * 1. Redistributions of source code must retain the above copyright | |
| 13 * notice, this list of conditions and the following disclaimer. | |
| 14 * 2. Redistributions in binary form must reproduce the above copyright | |
| 15 * notice, this list of conditions and the following disclaimer in the | |
| 16 * documentation and/or other materials provided with the distribution. | |
| 17 * | |
| 18 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
| 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 21 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE | |
| 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
| 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
| 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
| 28 * SUCH DAMAGE. | |
| 29 */ | |
| 30 | |
| 31 #include <avr/io.h> | |
| 32 #include <avr/interrupt.h> | |
| 33 #include <avr/pgmspace.h> | |
| 34 #include <string.h> | |
| 4 | 35 #include <ctype.h> |
| 13 | 36 #include <stdlib.h> |
| 24 | 37 #include <util/delay.h> |
| 0 | 38 |
| 39 #include "1wire.h" | |
| 37 | 40 #ifdef WITHUSB |
| 24 | 41 #include "usb.h" |
| 37 | 42 #endif |
| 0 | 43 |
| 44 #define UART_BAUD_SELECT(baudRate,xtalCpu) ((xtalCpu)/((baudRate)*16l)-1) | |
| 24 | 45 #define UART_BAUD_RATE 38400 |
| 46 | |
| 47 void process_cmd(void); | |
| 0 | 48 |
| 49 void uart_putsP(const char *addr); | |
| 50 void uart_puts(const char *addr); | |
| 51 int uart_putc(char c); | |
| 13 | 52 void uart_puts_dec(uint8_t a, uint8_t l); |
| 53 void uart_puts_hex(uint8_t a); | |
| 24 | 54 char uart_getc(void); |
| 11 | 55 |
| 24 | 56 /* Receive buffer storage */ |
| 57 volatile struct { | |
| 58 char buf[40]; | |
| 59 uint8_t state; | |
| 60 uint8_t len; | |
| 61 } cmd = { | |
| 62 .state = 255, | |
| 63 .len = 0 | |
| 64 }; | |
| 4 | 65 |
| 24 | 66 /* Rx complete */ |
| 67 ISR(USART_RXC_vect) { | |
| 68 volatile char pit; | |
| 69 char c; | |
| 70 | |
| 71 while (UCSRA & _BV(RXC)) { | |
| 72 /* 255 means we're waiting for main to process the command, | |
| 73 just throw stuff away | |
| 74 */ | |
| 75 if (cmd.state == 255) { | |
| 76 pit = UDR; | |
| 77 continue; | |
| 78 } | |
| 79 c = UDR; | |
| 80 | |
| 81 /* End of line? */ | |
| 82 if (c == '\n' || c == '\r') { | |
| 83 cmd.buf[cmd.state + 1] = '\0'; | |
| 38 | 84 uart_putsP(PSTR("\r\n")); |
| 24 | 85 cmd.len = cmd.state; |
| 86 cmd.state = 255; | |
| 87 continue; | |
| 88 } | |
| 89 | |
| 90 /* Backspace/delete */ | |
| 91 if (c == 0x08 || c == 0x7f) { | |
| 92 if (cmd.state > 0) { | |
| 93 cmd.state--; | |
| 94 uart_putsP(PSTR("\010\040\010")); | |
| 4 | 95 } |
| 96 continue; | |
| 97 } | |
| 0 | 98 |
| 24 | 99 /* Anything unprintable just ignore it */ |
| 100 if (!isprint(c)) | |
| 101 continue; | |
| 102 | |
| 103 cmd.buf[cmd.state] = tolower(c); | |
| 104 | |
| 105 /* Echo back to the user */ | |
| 106 uart_putc(cmd.buf[cmd.state]); | |
| 107 | |
| 108 cmd.state++; | |
| 109 /* Over flow? */ | |
| 110 if (cmd.state == ((sizeof(cmd.buf) / sizeof(cmd.buf[0])) - 1)) { | |
| 38 | 111 uart_putsP(PSTR("\r\nLine too long")); |
| 24 | 112 cmd.state = 0; |
| 113 continue; | |
| 114 } | |
| 115 } | |
| 116 } | |
| 117 | |
| 118 /* Tx complete */ | |
| 119 ISR(USART_TXC_vect) { | |
| 4 | 120 |
| 24 | 121 } |
| 122 | |
| 123 int | |
| 124 main(void) { | |
| 125 /* Disable interrupts while we frob stuff */ | |
| 126 cli(); | |
| 127 | |
| 37 | 128 #if 1 |
| 24 | 129 /* Disable JTAG (yes twice) */ |
| 130 MCUCSR |= _BV(JTD); | |
| 131 MCUCSR |= _BV(JTD); | |
| 37 | 132 #endif |
| 133 | |
| 134 #ifdef WITHUSB | |
| 24 | 135 /* USB data bus (7:0) */ |
| 136 DDRA = 0x00; | |
| 137 PORTA = 0x00; | |
| 138 | |
| 37 | 139 /* USB control (4:0) */ |
| 140 DDRB = 0x0d; | |
| 24 | 141 PORTB = 0x00; |
| 37 | 142 #else |
| 143 DDRA = 0xff; | |
| 144 PORTA = 0x00; | |
| 145 #endif | |
| 24 | 146 /* GPIO (0:7) */ |
| 147 DDRC = 0xff; | |
| 148 PORTC = 0x00; | |
| 149 | |
| 37 | 150 /* USART (0:1), IDBus (2:5), 485 (6:6), GPIO (7:7) */ |
| 151 DDRD = 0xf7; | |
| 152 PORTD = 0xf7; | |
| 153 | |
| 154 /* Set up the one wire stuff */ | |
| 155 OWInit(); | |
| 24 | 156 |
| 157 /* Init UART */ | |
| 158 UBRRH = UART_BAUD_SELECT(UART_BAUD_RATE, F_CPU) >> 8; | |
| 159 UBRRL = (uint8_t)UART_BAUD_SELECT(UART_BAUD_RATE, F_CPU); | |
| 160 | |
| 161 /* Enable receiver and transmitter. Turn on transmit interrupts */ | |
| 162 UCSRA = 0; | |
| 163 UCSRB = _BV(RXEN) | _BV(TXEN) | _BV(RXCIE); | |
| 164 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); | |
| 38 | 165 uart_putsP(PSTR("\r\n\r\n===============\r\n" |
| 166 "Inited!\r\n\r\n")); | |
| 24 | 167 |
| 168 /* Ready to go! */ | |
| 169 sei(); | |
| 170 | |
| 37 | 171 #if 0 |
| 172 DDRA = 0xff; | |
| 173 DDRC = 0xff; | |
| 174 while (1) { | |
| 38 | 175 uart_putsP(PSTR("1\r\n")); |
| 37 | 176 PORTA = 0xff; |
| 38 | 177 uart_putsP(PSTR("2\r\n")); |
| 37 | 178 PORTC = 0x00; |
| 38 | 179 uart_putsP(PSTR("3\r\n")); |
| 37 | 180 _delay_us(1); |
| 38 | 181 uart_putsP(PSTR("4\r\n")); |
| 37 | 182 PORTA = 0x80; |
| 38 | 183 uart_putsP(PSTR("5\r\n")); |
| 37 | 184 PORTC = 0xff; |
| 38 | 185 uart_putsP(PSTR("6\r\n")); |
| 37 | 186 } |
| 187 #endif | |
| 188 | |
| 189 #ifdef WITHUSB | |
| 38 | 190 uart_putsP(PSTR("Calling usb_init\r\n")); |
| 24 | 191 usb_init(); |
| 37 | 192 #endif |
| 38 | 193 uart_putsP(PSTR("done\r\n")); |
| 24 | 194 _delay_us(1000); |
| 195 uart_putsP(PSTR("> ")); | |
| 196 cmd.state = 0; | |
| 197 | |
| 198 /* Wait for user input or an "interrupt" */ | |
| 199 while (1) { | |
| 200 if (cmd.state == 255) { | |
| 201 process_cmd(); | |
| 202 uart_putsP(PSTR("> ")); | |
| 203 /* Allow new characters to be processed */ | |
| 204 cmd.state = 0; | |
| 205 } | |
| 206 | |
| 37 | 207 #ifdef WITHUSB |
| 208 if (!(PDICTL & _BV(PDIINT))) | |
| 24 | 209 usb_intr(); |
| 37 | 210 #endif |
| 24 | 211 } |
| 212 } | |
| 213 | |
| 214 void | |
| 215 process_cmd(void) { | |
| 216 uint8_t ROM[8]; | |
| 217 int8_t i, arg; | |
| 218 uint8_t crc, buf[9]; | |
| 219 int8_t temp; | |
| 220 uint16_t tfrac; | |
| 0 | 221 |
| 24 | 222 /* User just pressed enter */ |
| 223 if (cmd.len == 0) | |
| 224 return; | |
| 225 | |
| 226 if (cmd.buf[0] == '?') { | |
| 38 | 227 uart_putsP(PSTR("rs Reset and check for presence\r\n" |
| 228 "sr Search the bus for ROMs\r\n" | |
| 229 "re Read a bit\r\n" | |
| 230 "rb Read a byte\r\n" | |
| 231 "wr bit Write a bit\r\n" | |
| 232 "wb byte Write a byte (hex)\r\n" | |
| 233 "wc cmd [ROMID] Write command\r\n" | |
| 234 "te ROMID Read the temperature from a DS1820\r\n" | |
| 235 "in port Read from a port\r\n" | |
| 236 "out port val Write to a port\r\n" | |
| 237 "ddr port [val] Read/write DDR for a port\r\n")); | |
| 24 | 238 |
| 239 return; | |
| 240 } | |
| 241 | |
| 242 i = strlen((char *)cmd.buf); | |
| 243 if (cmd.len < 2) | |
| 244 goto badcmd; | |
| 245 | |
| 246 if (cmd.buf[0] == 'r' && cmd.buf[1] == 's') { | |
| 247 uart_putsP(PSTR("Resetting... ")); | |
| 4 | 248 |
| 24 | 249 if (OWTouchReset() == 1) |
| 38 | 250 uart_putsP(PSTR("No presence pulse found\r\n")); |
| 24 | 251 else |
| 38 | 252 uart_putsP(PSTR("Presence pulse found\r\n")); |
| 24 | 253 } else if (cmd.buf[0] == 'r' && cmd.buf[1] == 'e') { |
| 254 if (OWReadBit()) | |
| 38 | 255 uart_putsP(PSTR("Read a 1\r\n")); |
| 24 | 256 else |
| 38 | 257 uart_putsP(PSTR("Read a 0\r\n")); |
| 24 | 258 } else if (cmd.buf[0] == 'r' && cmd.buf[1] == 'b') { |
| 259 uart_putsP(PSTR("Read a 0x")); | |
| 260 uart_puts_hex(OWReadByte()); | |
| 38 | 261 uart_putsP(PSTR("\r\n")); |
| 24 | 262 } else if (cmd.buf[0] == 'w' && cmd.buf[1] == 'r') { |
| 263 arg = strtol((char *)cmd.buf + 3, (char **)NULL, 10); | |
| 264 OWWriteBit(arg); | |
| 265 uart_putsP(PSTR("Wrote a ")); | |
| 266 if (arg) | |
| 38 | 267 uart_putsP(PSTR("1\r\n")); |
| 24 | 268 else |
| 38 | 269 uart_putsP(PSTR("0\r\n")); |
| 24 | 270 } else if (cmd.buf[0] == 'w' && cmd.buf[1] == 'b') { |
| 271 arg = (int)strtol((char *)cmd.buf + 3, (char **)NULL, 16); | |
| 272 OWWriteByte(arg); | |
| 37 | 273 } else if (cmd.buf[0] == 'r' && cmd.buf[1] == 't') { |
| 274 if (cmd.len < 26) { | |
| 38 | 275 uart_putsP(PSTR("Unable to parse ROM ID\r\n")); |
| 37 | 276 return; |
| 277 } | |
| 278 | |
| 279 if (OWTouchReset() != 0) { | |
| 38 | 280 uart_putsP(PSTR("No presence\r\n")); |
| 37 | 281 return; |
| 282 } | |
| 283 | |
| 284 for (i = 0; i < 8; i++) | |
| 285 ROM[i] = (int)strtol((char *)cmd.buf + 3 * (i + 1), (char **)NULL, 16); | |
| 286 | |
| 287 if (ROM[0] != OW_FAMILY_ROM) { | |
| 38 | 288 uart_putsP(PSTR("ROM specified isn't a DS2502\r\n")); |
| 37 | 289 return; |
| 290 } | |
| 291 | |
| 292 if (OWTouchReset() != 0) { | |
| 38 | 293 uart_putsP(PSTR("No presence\r\n")); |
| 37 | 294 return; |
| 295 } | |
| 296 | |
| 297 crc = 0; | |
| 298 | |
| 299 OWCRC(OW_READ_STATUS, &crc); | |
| 300 OWSendCmd(ROM, OW_READ_STATUS); | |
| 301 | |
| 302 OWWriteByte(0x00); | |
| 303 OWCRC(0x00, &crc); | |
| 304 | |
| 305 OWWriteByte(0x00); | |
| 306 OWCRC(0x00, &crc); | |
| 307 | |
| 308 if (crc != OWReadByte()) { | |
| 38 | 309 uart_putsP(PSTR("CRC mismatch on command & address\r\n")); |
| 37 | 310 return; |
| 311 } | |
| 312 | |
| 313 crc = 0; | |
| 314 for (i = 0; i < 8; i++) { | |
| 315 temp = OWReadByte(); | |
| 316 uart_puts_hex(temp); | |
| 317 OWCRC(temp, &crc); | |
| 318 uart_putsP(PSTR(" ")); | |
| 319 } | |
| 38 | 320 uart_putsP(PSTR("\r\n")); |
| 37 | 321 if (crc != OWReadByte()) { |
| 38 | 322 uart_putsP(PSTR("CRC mismatch on data\r\n")); |
| 37 | 323 return; |
| 324 } | |
| 325 } else if (cmd.buf[0] == 'w' && cmd.buf[1] == 'e') { | |
| 326 if (cmd.len < 26) { | |
| 38 | 327 uart_putsP(PSTR("Unable to parse ROM ID\r\n")); |
| 37 | 328 return; |
| 329 } | |
| 330 | |
| 331 for (i = 0; i < 8; i++) | |
| 332 ROM[i] = (int)strtol((char *)cmd.buf + 3 * (i + 1), (char **)NULL, 16); | |
| 333 | |
| 334 if (ROM[0] != OW_FAMILY_ROM) { | |
| 38 | 335 uart_putsP(PSTR("ROM specified isn't a ROM\r\n")); |
| 37 | 336 return; |
| 337 } | |
| 338 | |
| 339 buf[0] = (int)strtol((char *)cmd.buf + 27, (char **)NULL, 16); /* Address */ | |
| 340 buf[1] = (int)strtol((char *)cmd.buf + 30, (char **)NULL, 16); /* Data .. */ | |
| 341 buf[2] = (int)strtol((char *)cmd.buf + 33, (char **)NULL, 16); | |
| 342 | |
| 343 if (OWTouchReset() != 0) { | |
| 38 | 344 uart_putsP(PSTR("No presence\r\n")); |
| 37 | 345 return; |
| 346 } | |
| 347 | |
| 348 i = OWProgROM(ROM, buf[0], 2, &buf[1], 0, 0); | |
| 349 uart_putsP(PSTR("OWProgROM returned ")); | |
| 350 uart_puts_dec(i, 0); | |
| 38 | 351 uart_putsP(PSTR("\r\n")); |
| 37 | 352 } else if (cmd.buf[0] == 'r' && cmd.buf[1] == 'r') { |
| 353 if (cmd.len < 26) { | |
| 38 | 354 uart_putsP(PSTR("Unable to parse ROM ID\r\n")); |
| 37 | 355 return; |
| 356 } | |
| 357 | |
| 358 for (i = 0; i < 8; i++) | |
| 359 ROM[i] = (int)strtol((char *)cmd.buf + 3 * (i + 1), (char **)NULL, 16); | |
| 360 | |
| 361 if (ROM[0] != OW_FAMILY_ROM) { | |
| 38 | 362 uart_putsP(PSTR("ROM specified isn't a ROM\r\n")); |
| 37 | 363 return; |
| 364 } | |
| 365 | |
| 366 crc = 0; | |
| 367 OWSendCmd(ROM, OW_READ_MEMORY); | |
| 368 OWCRC(OW_READ_MEMORY, &crc); | |
| 369 | |
| 370 OWWriteByte(0x00); | |
| 371 OWCRC(0x00, &crc); | |
| 372 | |
| 373 OWWriteByte(0x00); | |
| 374 OWCRC(0x00, &crc); | |
| 375 | |
| 376 if (crc != OWReadByte()) { | |
| 38 | 377 uart_putsP(PSTR("CRC mismatch on command & address\r\n")); |
| 37 | 378 return; |
| 379 } | |
| 380 | |
| 381 crc = 0; | |
| 382 for (buf[0] = 0; buf[0] < 128; buf[0]++) { | |
| 383 buf[1] = OWReadByte(); | |
| 384 if (buf[0] > 0) { | |
| 385 if (buf[0] % 16 != 0) | |
| 386 uart_putsP(PSTR(" ")); | |
| 387 else | |
| 38 | 388 uart_putsP(PSTR("\r\n")); |
| 37 | 389 } |
| 390 | |
| 391 uart_puts_hex(buf[1]); | |
| 392 OWCRC(buf[1], &crc); | |
| 393 } | |
| 38 | 394 uart_putsP(PSTR("\r\n")); |
| 37 | 395 if (crc != OWReadByte()) { |
| 38 | 396 uart_putsP(PSTR("CRC mismatch on data\r\n")); |
| 37 | 397 return; |
| 398 } | |
| 399 | |
| 24 | 400 } else if (cmd.buf[0] == 'w' && cmd.buf[1] == 'c') { |
| 401 if (cmd.len < 5) { | |
| 38 | 402 uart_putsP(PSTR("No arguments\r\n")); |
| 24 | 403 return; |
| 404 } | |
| 405 | |
| 406 arg = (int)strtol((char *)cmd.buf + 3, (char **)NULL, 16); | |
| 407 if (arg == 0) { | |
| 38 | 408 uart_putsP(PSTR("Unparseable command\r\n")); |
| 24 | 409 return; |
| 410 } | |
| 13 | 411 |
| 24 | 412 if (i == 5) { |
| 413 OWSendCmd(NULL, arg); | |
| 414 return; | |
| 415 } | |
| 4 | 416 |
| 24 | 417 if (i < 29) { |
| 38 | 418 uart_putsP(PSTR("Can't parse ROM ID\r\n")); |
| 24 | 419 return; |
| 420 } | |
| 421 for (i = 0; i < 8; i++) | |
| 422 ROM[i] = (int)strtol((char *)cmd.buf + 6 + (3 * i), (char **)NULL, 16); | |
| 423 | |
| 424 OWSendCmd(ROM, arg); | |
| 425 } else if (cmd.buf[0] == 't' && cmd.buf[1] == 'e') { | |
| 426 if (cmd.len < 26) { | |
| 38 | 427 uart_putsP(PSTR("Unable to parse ROM ID\r\n")); |
| 24 | 428 return; |
| 429 } | |
| 430 | |
| 431 for (i = 0; i < 8; i++) | |
| 432 ROM[i] = (int)strtol((char *)cmd.buf + 3 * (i + 1), (char **)NULL, 16); | |
| 433 | |
| 434 if (ROM[0] != OW_FAMILY_TEMP) { | |
| 38 | 435 uart_putsP(PSTR("ROM specified isn't a temperature sensor\r\n")); |
| 24 | 436 return; |
| 437 } | |
| 4 | 438 |
| 24 | 439 OWSendCmd(ROM, OW_CONVERTT_CMD); |
| 440 i = 0; | |
| 37 | 441 /* Wait for the conversion */ |
| 24 | 442 while (OWReadBit() == 0) { |
| 443 i++; | |
| 444 } | |
| 445 OWSendCmd(ROM, OW_RD_SCR_CMD); | |
| 446 crc = 0; | |
| 447 for (i = 0; i < 9; i++) { | |
| 448 buf[i] = OWReadByte(); | |
| 449 if (i < 8) | |
| 450 OWCRC(buf[i], &crc); | |
| 451 } | |
| 452 | |
| 453 if (crc != buf[8]) { | |
| 38 | 454 uart_putsP(PSTR("CRC mismatch\r\n")); |
| 24 | 455 return; |
| 456 } | |
| 4 | 457 |
| 13 | 458 #if 0 |
| 24 | 459 uart_putsP(PSTR("temperature ")); |
| 460 uart_puts_dec(temp >> 4, 0); | |
| 461 uart_putsP(PSTR(".")); | |
| 462 uart_puts_dec((temp << 12) / 6553, 0); | |
| 38 | 463 uart_putsP(PSTR("\r\n")); |
| 13 | 464 #else |
| 24 | 465 /* 0 Temperature LSB |
| 466 * 1 Temperature MSB | |
| 467 * 2 Th | |
| 468 * 3 Tl | |
| 469 * 4 Reserved | |
| 470 * 5 Reserved | |
| 471 * 6 Count Remain | |
| 472 * 7 Count per C | |
| 473 * 8 CRC | |
| 474 */ | |
| 13 | 475 #if 0 |
| 24 | 476 for (i = 0; i < 9; i++) { |
| 477 uart_puts_dec(buf[i], 0); | |
| 38 | 478 uart_putsP(PSTR("\r\n")); |
| 24 | 479 } |
| 13 | 480 #endif |
| 24 | 481 temp = buf[0]; |
| 482 if (buf[1] & 0x80) | |
| 483 temp -= 256; | |
| 484 temp >>= 1; | |
| 13 | 485 |
| 24 | 486 tfrac = buf[7] - buf[6]; |
| 487 tfrac *= (uint16_t)100; | |
| 488 tfrac /= buf[7]; | |
| 489 tfrac += 75; | |
| 490 if (tfrac < 100) { | |
| 491 temp--; | |
| 492 } else { | |
| 493 tfrac -= 100; | |
| 494 } | |
| 13 | 495 |
| 24 | 496 if (temp < 0){ |
| 497 uart_putc('-'); | |
| 498 uart_puts_dec(-temp, 0); | |
| 499 } else | |
| 500 uart_puts_dec(temp, 0); | |
| 501 uart_putsP(PSTR(".")); | |
| 502 uart_puts_dec(tfrac, 1); | |
| 38 | 503 uart_putsP(PSTR("\r\n")); |
| 13 | 504 |
| 505 #endif | |
| 24 | 506 } else if (cmd.buf[0] == 's' && cmd.buf[1] == 'r') { |
| 507 memset(ROM, 0, 8); | |
| 10 | 508 |
| 24 | 509 i = OWFirst(ROM, 1, 0); |
| 510 do { | |
| 511 switch (i) { | |
| 10 | 512 case OW_BADWIRE: |
| 38 | 513 uart_putsP(PSTR("Presence pulse, but no module found, bad module/cabling?\r\n")); |
| 10 | 514 break; |
| 515 | |
| 516 case OW_NOPRESENCE: | |
| 38 | 517 uart_putsP(PSTR("No presence pulse found\r\n")); |
| 10 | 518 break; |
| 519 | |
| 520 case OW_BADCRC: | |
| 38 | 521 uart_putsP(PSTR("Bad CRC\r\n")); |
| 10 | 522 break; |
| 523 | |
| 524 case OW_NOMODULES: | |
| 525 case OW_FOUND: | |
| 526 break; | |
| 527 | |
| 528 default: | |
| 38 | 529 uart_putsP(PSTR("Unknown error from 1 wire library\r\n")); |
| 10 | 530 break; |
| 24 | 531 } |
| 10 | 532 |
| 24 | 533 if (i != OW_FOUND) |
| 534 break; | |
| 13 | 535 |
| 24 | 536 for (i = 0; i < 7; i++) { |
| 537 uart_puts_hex(ROM[i]); | |
| 538 uart_putc(':'); | |
| 539 } | |
| 540 uart_puts_hex(ROM[7]); | |
| 38 | 541 uart_putsP(PSTR("\r\n")); |
| 10 | 542 |
| 24 | 543 i = OWNext(ROM, 1, 0); |
| 544 } while (1); | |
| 545 } else if (cmd.buf[0] == 'i' && cmd.buf[1] == 'n') { | |
| 546 switch (tolower(cmd.buf[3])) { | |
| 547 case 'a': | |
| 548 crc = PINA; | |
| 549 break; | |
| 550 | |
| 551 case 'b': | |
| 552 crc = PINB; | |
| 553 break; | |
| 554 | |
| 555 case 'c': | |
| 556 crc = PINC; | |
| 557 break; | |
| 558 | |
| 559 case 'd': | |
| 560 crc = PIND; | |
| 561 break; | |
| 562 | |
| 563 default: | |
| 38 | 564 uart_putsP(PSTR("Unknown port\r\n")); |
| 24 | 565 return; |
| 0 | 566 } |
| 24 | 567 uart_putsP(PSTR("0x")); |
| 568 uart_puts_hex(crc); | |
| 38 | 569 uart_putsP(PSTR("\r\n")); |
| 24 | 570 } else if (cmd.buf[0] == 'o' && cmd.buf[1] == 'u') { |
| 571 crc = strtol((char *)cmd.buf + 8, (char **)NULL, 16); | |
| 572 switch (tolower(cmd.buf[4])) { | |
| 573 case 'a': | |
| 574 PORTA = crc; | |
| 575 break; | |
| 576 | |
| 577 case 'b': | |
| 578 PORTB = crc; | |
| 579 break; | |
| 580 | |
| 581 case 'c': | |
| 582 PORTC = crc; | |
| 583 break; | |
| 584 | |
| 585 case 'd': | |
| 586 PORTD = crc; | |
| 587 break; | |
| 588 | |
| 589 default: | |
| 38 | 590 uart_putsP(PSTR("Unknown port\r\n")); |
| 24 | 591 return; |
| 592 } | |
| 593 uart_putsP(PSTR("0x")); | |
| 594 uart_puts_hex(crc); | |
| 38 | 595 uart_putsP(PSTR("\r\n")); |
| 37 | 596 } else if (cmd.buf[0] == 'd' && cmd.buf[1] == 'd') { |
| 597 crc = strtol((char *)cmd.buf + 8, (char **)NULL, 16); | |
| 598 switch (tolower(cmd.buf[4])) { | |
| 599 case 'a': | |
| 600 DDRA = crc; | |
| 601 break; | |
| 602 | |
| 603 case 'b': | |
| 604 DDRB = crc; | |
| 605 break; | |
| 606 | |
| 607 case 'c': | |
| 608 DDRC = crc; | |
| 609 break; | |
| 610 | |
| 611 case 'd': | |
| 612 DDRD = crc; | |
| 613 break; | |
| 614 | |
| 615 default: | |
| 38 | 616 uart_putsP(PSTR("Unknown port\r\n")); |
| 37 | 617 return; |
| 618 } | |
| 619 uart_putsP(PSTR("0x")); | |
| 620 uart_puts_hex(crc); | |
| 38 | 621 uart_putsP(PSTR("\r\n")); |
| 37 | 622 #ifdef WITHUSB |
| 24 | 623 } else if (cmd.buf[0] == 'u' && cmd.buf[1] == 's') { |
| 624 usb_gendata(); | |
| 37 | 625 #endif |
| 24 | 626 } else { |
| 627 badcmd: | |
| 38 | 628 uart_putsP(PSTR("Unknown command, ? for a list\r\n")); |
| 0 | 629 } |
| 24 | 630 } |
| 0 | 631 |
| 632 int | |
| 633 uart_putc(char c) { | |
| 24 | 634 loop_until_bit_is_set(UCSRA, UDRE); |
|
17
a58b41b7d15c
Covert to a later version of avr-libc. Stuff like not using inb/outb,
darius
parents:
16
diff
changeset
|
635 UDR = c; |
| 0 | 636 |
| 637 return(0); | |
| 638 } | |
| 639 | |
| 640 void | |
| 641 uart_putsP(const char *addr) { | |
| 642 char c; | |
| 643 | |
|
17
a58b41b7d15c
Covert to a later version of avr-libc. Stuff like not using inb/outb,
darius
parents:
16
diff
changeset
|
644 while ((c = pgm_read_byte_near(addr++))) |
| 0 | 645 uart_putc(c); |
| 646 } | |
| 647 | |
| 648 void | |
| 649 uart_puts(const char *addr) { | |
| 650 while (*addr) | |
| 651 uart_putc(*addr++); | |
| 652 } | |
| 653 | |
| 13 | 654 void |
| 655 uart_puts_dec(uint8_t a, uint8_t l) { | |
| 656 char s[4]; | |
| 657 | |
| 658 if (l && a < 10) | |
| 659 uart_putsP(PSTR("0")); | |
| 660 uart_puts(utoa(a, s, 10)); | |
| 661 } | |
| 662 | |
| 663 void | |
| 664 uart_puts_hex(uint8_t a) { | |
| 665 char s[3]; | |
| 666 | |
| 667 if (a < 0x10) | |
| 668 uart_putc('0'); | |
| 669 | |
| 670 uart_puts(utoa(a, s, 16)); | |
| 671 } | |
| 672 | |
| 24 | 673 char |
| 0 | 674 uart_getc(void) { |
| 24 | 675 while (!(UCSRA & _BV(RXC))) |
| 0 | 676 ; |
| 677 | |
|
17
a58b41b7d15c
Covert to a later version of avr-libc. Stuff like not using inb/outb,
darius
parents:
16
diff
changeset
|
678 return (UDR); |
| 0 | 679 } |
| 4 | 680 |