Mercurial > ~darius > hgwebdir.cgi > stm32test
changeset 10:0b75cff7c570
Add _usleep16 - sleeps for cnt microseconds.
| author | Daniel O'Connor <darius@dons.net.au> |
|---|---|
| date | Mon, 06 Feb 2012 23:54:36 +1030 |
| parents | be0a1ac64d97 |
| children | ca48036c82ef |
| files | hw.c |
| diffstat | 1 files changed, 33 insertions(+), 1 deletions(-) [+] |
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--- a/hw.c Sun Feb 05 16:41:42 2012 +1030 +++ b/hw.c Mon Feb 06 23:54:36 2012 +1030 @@ -1,9 +1,19 @@ #include <stdint.h> +#include <stdio.h> #include "stm32f10x.h" #include "lcd.h" static void hw_port_cfg(void); +/* Wait for cnt microseconds */ +void _usleep16(uint16_t cnt) { + TIM6->ARR = cnt; + TIM_SetCounter(TIM6, 0); + TIM_Cmd(TIM6, ENABLE); + while ((TIM6->CR1 & TIM_CR1_CEN) != 0) + ; + +} void hw_init(void) { hw_port_cfg(); @@ -259,5 +269,27 @@ SPI_Init(SPI1, &SPI_InitStructure); /* SPI1 enable */ - SPI_Cmd(SPI1, ENABLE); + SPI_Cmd(SPI1, ENABLE); + + /* Configure TIM6 for interval timing */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE); + + /* Reset TIM6 */ + TIM_DeInit(TIM6); + + /* Time Base configuration */ + TIM_TimeBaseStructure.TIM_Period = 0; + TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 1000000) - 1; /* 1 MHz clock */ + TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure); + + TIM_Cmd(TIM6, DISABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + TIM_SelectOnePulseMode(TIM6, TIM_OPMode_Single); + TIM_UpdateDisableConfig(TIM6, DISABLE); + }