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Add 1wire code. 1wire.c, 1wire.h and 1wire-config.h are copied avr-lib.
author Daniel O'Connor <darius@dons.net.au>
date Wed, 08 Feb 2012 10:37:22 +1030
parents c59513fd84fb
children
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1 <html>
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3 <head>
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4 <title>CMSIS Changes</title>
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5 <meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
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6 <meta name="GENERATOR" content="Microsoft FrontPage 6.0">
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8 <style>
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9 <!--
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10 /*-----------------------------------------------------------
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11 Keil Software CHM Style Sheet
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12 -----------------------------------------------------------*/
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13 body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
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40 /*-----------------------------------------------------------
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41 Notes
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42 -----------------------------------------------------------*/
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43 p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
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44 /*-----------------------------------------------------------
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45 Expanding/Contracting Divisions
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46 -----------------------------------------------------------*/
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47 #expand { text-decoration: none; margin-bottom: 3pt }
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50 /*-----------------------------------------------------------
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51 Where List Tags
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52 -----------------------------------------------------------*/
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53 p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
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58 /*-----------------------------------------------------------
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59 Keil Table Tags
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60 -----------------------------------------------------------*/
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63 padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
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66 padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
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68 /*-----------------------------------------------------------
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69 -----------------------------------------------------------*/
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70 -->
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72 </style>
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73 </head>
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74
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75 <body>
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76
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77 <h1>Changes to CMSIS version V1.20</h1>
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78
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79 <hr>
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80
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81 <h2>1. Removed CMSIS Middelware packages</h2>
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82 <p>
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83 CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
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84 </p>
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85
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86 <h2>2. SystemFrequency renamed to SystemCoreClock</h2>
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87 <p>
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88 The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
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89 because the variable holds the clock value at which the core is running.
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90 </p>
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91
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92 <h2>3. Changed startup concept</h2>
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93 <p>
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94 The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
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95 from main) has the weakness that it does not work for controllers which need a already
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96 configuerd clock system to configure the external memory controller.
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97 </p>
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98
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99 <h3>Changed startup concept</h3>
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100 <ul>
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101 <li>
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102 SystemInit() is called from startup file before <strong>premain</strong>.
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103 </li>
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104 <li>
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105 <strong>SystemInit()</strong> configures the clock system and also configures
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106 an existing external memory controller.
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107 </li>
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108 <li>
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109 <strong>SystemInit()</strong> must not use global variables.
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110 </li>
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111 <li>
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112 <strong>SystemCoreClock</strong> is initialized with a correct predefined value.
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113 </li>
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114 <li>
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115 Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
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116 <strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
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117 and must be called whenever the core clock is changed.<br>
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118 <strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
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119 the current core clock.
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120 </li>
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121 </ul>
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122
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123
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124 <h2>4. Advanced Debug Functions</h2>
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125 <p>
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126 ITM communication channel is only capable for OUT direction. To allow also communication for
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127 IN direction a simple concept is provided.
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128 </p>
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129 <ul>
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130 <li>
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131 Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
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132 </li>
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133 <li>
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134 Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
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135 </li>
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136 <li>
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137 Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
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138 </li>
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139 </ul>
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140
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141 <p>
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142 For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
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143 </p>
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144
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145
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146 <h2>5. Core Register Bit Definitions</h2>
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147 <p>
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148 Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
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149 defines correspond with the Cortex-M Technical Reference Manual.
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150 </p>
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151 <p>
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152 e.g. SysTick structure with bit definitions
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153 </p>
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154 <pre>
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155 /** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
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156 memory mapped structure for SysTick
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157 @{
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158 */
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159 typedef struct
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160 {
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161 __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
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162 __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
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163 __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
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164 __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
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165 } SysTick_Type;
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166
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167 /* SysTick Control / Status Register Definitions */
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168 #define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
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169 #define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
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170
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171 #define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
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172 #define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
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173
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174 #define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
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175 #define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
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176
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177 #define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
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178 #define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
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179
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180 /* SysTick Reload Register Definitions */
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181 #define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
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182 #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
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183
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184 /* SysTick Current Register Definitions */
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185 #define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
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186 #define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
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187
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188 /* SysTick Calibration Register Definitions */
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189 #define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
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190 #define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
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191
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192 #define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
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193 #define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
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194
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195 #define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
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196 #define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
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197 /*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
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198
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199 <h2>7. DoxyGen Tags</h2>
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200 <p>
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201 DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
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202 using DoxyGen.
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203 </p>
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204
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205 <h2>8. Folder Structure</h2>
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206 <p>
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207 The folder structure is changed to differentiate the single support packages.
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208 </p>
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209
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210 <ul>
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211 <li>CM0</li>
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212 <li>CM3
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213 <ul>
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214 <li>CoreSupport</li>
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215 <li>DeviceSupport</li>
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216 <ul>
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217 <li>Vendor
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218 <ul>
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219 <li>Device
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220 <ul>
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221 <li>Startup
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222 <ul>
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223 <li>Toolchain</li>
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224 <li>Toolchain</li>
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225 <li>...</li>
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226 </ul>
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227 </li>
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228 </ul>
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229 </li>
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230 <li>Device</li>
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231 <li>...</li>
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232 </ul>
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233 </li>
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234 <li>Vendor</li>
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235 <li>...</li>
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236 </ul>
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237 </li>
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238 <li>Example
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239 <ul>
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240 <li>Toolchain
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241 <ul>
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242 <li>Device</li>
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243 <li>Device</li>
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244 <li>...</li>
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245 </ul>
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246 </li>
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247 <li>Toolchain</li>
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248 <li>...</li>
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249 </ul>
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250 </li>
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251 </ul>
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252 </li>
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253
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254 <li>Documentation</li>
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255 </ul>
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256
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257 <h2>9. Open Points</h2>
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258 <p>
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259 Following points need to be clarified and solved:
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260 </p>
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261 <ul>
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262 <li>
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263 <p>
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264 Equivalent C and Assembler startup files.
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265 </p>
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266 <p>
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267 Is there a need for having C startup files although assembler startup files are
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268 very efficient and do not need to be changed?
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269 <p/>
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270 </li>
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271 <li>
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272 <p>
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273 Placing of HEAP in external RAM.
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274 </p>
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275 <p>
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276 It must be possible to place HEAP in external RAM if the device supports an
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277 external memory controller.
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278 </p>
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279 </li>
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280 <li>
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281 <p>
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282 Placing of STACK /HEAP.
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283 </p>
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284 <p>
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285 STACK should always be placed at the end of internal RAM.
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286 </p>
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287 <p>
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288 If HEAP is placed in internal RAM than it should be placed after RW ZI section.
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289 </p>
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290 </li>
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291 <li>
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292 <p>
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293 Removing core_cm3.c and core_cm0.c.
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294 </p>
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295 <p>
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296 On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
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297 appropriate compiler intrinsics.
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298 </p>
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299 </li>
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300 </ul>
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301
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302
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303 <h2>10. Limitations</h2>
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304 <p>
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305 The following limitations are not covered with the current CMSIS version:
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306 </p>
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307 <ul>
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308 <li>
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309 No <strong>C startup files</strong> for ARM toolchain are provided.
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310 </li>
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311 <li>
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312 No <strong>C startup files</strong> for GNU toolchain are provided.
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313 </li>
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314 <li>
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315 No <strong>C startup files</strong> for IAR toolchain are provided.
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316 </li>
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317 <li>
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318 No <strong>Tasking</strong> projects are provided yet.
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319 </li>
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320 </ul>