Mercurial > ~darius > hgwebdir.cgi > stm32test
annotate lcd.c @ 3:74e9b3baac1e
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Sun, 01 Jan 2012 11:01:13 +1030 |
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children | 2c87e30c982d |
rev | line source |
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3
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1 /* |
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2 * Example code (I think) |
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3 * ~/projects/STM32Strive/奋斗STM32开发板例程/奋斗STM32开发板例程/奋斗STM32开发板MINI/STM32奋斗版ucOS II V2.86 uCGUI 3.9 DEMO-V2/STM32奋斗版ucOS II V2.86 uCGUI 3.9 DEMO |
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4 * |
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5 * Schematics |
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6 * Main board ~/Downloads/Strive\ Mini\ STM32\ Schematic.pdf |
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7 * LCD board ~/Downloads/Strive Mini LCD STM32 Schematic.pdf |
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8 * MCU reference manual |
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9 * ~/Downloads/CD00171190.pdf |
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10 * MCU Data sheet (pinout) |
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11 * ~/Downloads/CD00191185.pdf |
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12 * LCD data sheet |
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13 * |
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14 */ |
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15 /* LCD board MCU |
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16 1 VCC |
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17 2 TC_SCK PA5/SPI1_SCK |
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18 3 GND |
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19 4 TC_CS PB7/SPI1_CS3 |
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20 5 RST PE1 FSMC_NBL1? (unlikely) |
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21 6 TC_DIN PA7/SPI1_MOSI |
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22 7 nOE PD4/FSMC_nOE |
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23 8 TC_DOUT PA6/SPI1_MISO |
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24 9 nWR PD5/FSMC_nWE |
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25 10 TC_INT PB6 |
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26 11 CS PD7/FSMC_NE1/FSMC_NCE2 |
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27 12 NC |
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28 13 RS PD11/FSMC_A16 |
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29 14 NC |
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30 15 D7 PE10/FSMC_D7 |
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31 16 NC |
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32 17 D6 PE9/FSMC_D6 |
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33 18 NC |
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34 19 D3 PD1/FSMC_D3 |
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35 20 D13 PD8/FSMC_D13 |
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36 21 D5 PE8/FSMC_D5 |
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37 22 D12 PE15/FSMC_D12 |
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38 23 D4 PE7/FSMC_D4 |
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39 24 GND |
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40 25 NC |
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41 26 D11 PE14/FSMC_D11 |
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42 27 D2 PD0/FSMC_D2 |
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43 28 D10 PE13/FSMC_D10 |
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44 29 D1 PD15/FSMC_D1 |
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45 30 D9 PE12/FSMC_D9 |
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46 31 D0 PD14/FSMC_D0 |
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47 32 D14 PD9/FSMC_D9 |
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48 33 NC |
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49 34 D8 PE11/FSMC_D8 |
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50 35 NC |
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51 36 NC |
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52 37 NC |
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53 38 LCD_PWM PD13/TIM4_CH2 |
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54 39 NC |
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55 40 D15 PD10/FSMC_D15 |
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56 */ |
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57 |
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58 #include "stm32f10x.h" |
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59 #include "lcd.h" |
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60 |
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61 void |
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62 LCD_init(void) { |
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63 GPIO_InitTypeDef GPIO_InitStructure; |
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64 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
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65 FSMC_NORSRAMTimingInitTypeDef p; |
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66 |
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67 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode. |
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68 * |
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69 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14), |
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70 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1) |
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71 */ |
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72 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 | |
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73 GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_14 | GPIO_Pin_15); |
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74 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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75 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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76 GPIO_Init(GPIOD, &GPIO_InitStructure); |
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77 |
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78 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10), |
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79 * PE14(D11), PE15(D12) |
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80 */ |
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81 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | |
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82 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; |
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83 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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84 |
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85 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */ |
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86 /* FSMC_Bank1_NORSRAM4 timing configuration */ |
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87 p.FSMC_AddressSetupTime = 1; |
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88 p.FSMC_AddressHoldTime = 0; |
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89 p.FSMC_DataSetupTime = 2; |
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90 p.FSMC_BusTurnAroundDuration = 0; |
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91 p.FSMC_CLKDivision = 0; |
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92 p.FSMC_DataLatency = 0; |
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93 p.FSMC_AccessMode = FSMC_AccessMode_A; |
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94 |
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95 /* FSMC_Bank1_NORSRAM4 configured as follows: |
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96 - Data/Address MUX = Disable |
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97 - Memory Type = SRAM |
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98 - Data Width = 16bit |
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99 - Write Operation = Enable |
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100 - Extended Mode = Disable |
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101 - Asynchronous Wait = Disable */ |
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102 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; |
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103 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
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104 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
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105 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
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106 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
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107 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
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108 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
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109 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
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110 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
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111 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
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112 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
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113 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
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114 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
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115 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
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116 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
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117 |
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118 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
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119 |
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120 /* Enable FSMC_Bank1_NORSRAM4 */ |
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121 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); |
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122 } |