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view spiflash.h @ 80:1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Sun, 07 Jul 2013 22:49:02 +0930 |
parents | flash.h@aaf0603d7f88 |
children |
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void spiflashcmd(int argc, char **argv); uint16_t spiflashreadid(void); uint8_t spiflashreadstatus(void); void spiflashwritestatus(uint8_t status); void spiflashwritectl(int enable); void spiflash4kerase(uint32_t addr); uint8_t spiflashread(uint32_t addr); void spiflashenablewrite(void); void spiflashwrite(uint32_t addr, uint8_t data); void spiflashwait(void); int spiflashreadblock(uint32_t addr, uint32_t len, void *_data); int spiflashwriteblock(uint32_t addr, uint32_t len, void *_data); uint32_t spiflashcrcblock(uint32_t addr, uint32_t len); void spiflashprintstatus(uint8_t status, FILE *out); /* Streaming read/write */ void spiflashstartread(uint32_t addr); uint8_t spiflashreadbyte(void); void spiflashstartwrite(uint32_t addr, uint16_t data); void spiflashwriteword(uint16_t data); void spiflashstopread(void); void spiflashstopwrite(void); #define FL_BUSY (1<<0) #define FL_WEL (1<<1) #define FL_BP0 (1<<2) #define FL_BP1 (1<<3) #define FL_BP2 (1<<4) #define FL_BP3 (1<<5) #define FL_AAI (1<<6) #define FL_BPL (1<<7) #define FL_READ 0x03 #define FL_HSREAD 0x0b #define FL_4KERASE 0x20 #define FL_32KERASE 0x52 #define FL_64KERASE 0xd8 #define FL_CHIPERASE 0x60 #define FL_BYTEPROG 0x02 #define FL_AAIWP 0xad #define FL_RDSR 0x05 #define FL_EWSR 0x50 #define FL_WRSR 0x01 #define FL_WREN 0x06 #define FL_WRDI 0x04 #define FL_RDID 0x90 #define FL_JEDECID 0x9f #define FL_EBSY 0x70 #define FL_DBSY 0x80