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diff sd.c @ 55:b21db2b47a27

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Enable DMA mode by initing DMA channel and enabling IRQ handler.
author Daniel O'Connor <darius@dons.net.au>
date Sun, 07 Apr 2013 22:34:05 +0930
parents 79c7892d07b3
children f0563086040d
line wrap: on
line diff
--- a/sd.c	Sun Apr 07 22:33:16 2013 +0930
+++ b/sd.c	Sun Apr 07 22:34:05 2013 +0930
@@ -362,14 +362,56 @@
 
 void
 SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize) {
-    printf("SD_LowLevel_DMA_RxConfig unimplemented\n");
-    abort();
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4);
+
+    /* DMA2 Channel4 disable */
+    DMA_Cmd(DMA2_Channel4, DISABLE);
+
+    /* DMA2 Channel4 Config */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)0x40018080;
+    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+    DMA_InitStructure.DMA_BufferSize = BufferSize / 4;
+    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+    DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+    DMA_Init(DMA2_Channel4, &DMA_InitStructure);
+
+    /* DMA2 Channel4 enable */
+    DMA_Cmd(DMA2_Channel4, ENABLE); 
 }
 
 void
 SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize) {
-    printf("SD_LowLevel_DMA_TxConfig unimplemented\n");
-    abort();
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4);
+
+    /* DMA2 Channel4 disable */
+    DMA_Cmd(DMA2_Channel4, DISABLE);
+
+    /* DMA2 Channel4 Config */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)0x40018080;
+    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+    DMA_InitStructure.DMA_BufferSize = BufferSize / 4;
+    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+    DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+    DMA_Init(DMA2_Channel4, &DMA_InitStructure);
+
+    /* DMA2 Channel4 enable */
+    DMA_Cmd(DMA2_Channel4, ENABLE);  
 }
 
 uint32_t SD_DMAEndOfTransferStatus(void) {
@@ -478,3 +520,9 @@
 	       buf[i + 8], buf[i + 9], buf[i + 10], buf[i + 11], buf[i + 12], buf[i + 13], buf[i + 14], buf[i + 15]);
     }
 }
+
+void SDIO_IRQHandler(void) {
+  /* Process All SDIO Interrupt Sources */
+  SD_ProcessIRQSrc();
+}
+