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diff hw.c @ 40:a38003b97de6

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Use debug cycle counter to handle delays.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 01 Apr 2013 20:06:03 +1030
parents 188d5a8a7470
children 2db4bb90cfca
line wrap: on
line diff
--- a/hw.c	Mon Apr 01 19:45:38 2013 +1030
+++ b/hw.c	Mon Apr 01 20:06:03 2013 +1030
@@ -363,4 +363,12 @@
     }
 
 #endif
+
+    // From http://forums.arm.com/index.php?/topic/13949-cycle-count-in-cortex-m3/
+    // via http://stackoverflow.com/questions/11530593/cycle-counter-on-arm-cortex-m4-or-m3/11530829#11530829
+    volatile uint32_t *DWT_CONTROL = (uint32_t *)0xe0001000;
+    volatile uint32_t *SCB_DEMCR = (uint32_t *)0xe000edfc;
+
+    *SCB_DEMCR = *SCB_DEMCR | 0x01000000;
+    *DWT_CONTROL = *DWT_CONTROL | 1 ; // enable the counter
 }