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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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children 274e01fa5a4c
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-1:000000000000 0:c59513fd84fb
1 #include <ctype.h>
2 #include <stdio.h>
3 #include <stdint.h>
4 #include "stm32f10x.h"
5 #include "main.h"
6 #include "comm.h"
7
8 USART_InitTypeDef USART_InitStructure;
9
10 void Setup_HW(void);
11 void NVIC_Configuration(void);
12
13 /* Called every millisecond */
14 RAMFUNC void
15 SysTick_Handler(void) {
16 static uint32_t tick;
17
18 tick++;
19 }
20
21 RAMFUNC void
22 USART1_IRQHandler(void) {
23
24 }
25
26 typedef volatile struct {
27 char buf[40];
28 uint8_t state;
29 uint8_t len;
30 } consbuf_t;
31
32 int
33 main(void) {
34 consbuf_t cmd;
35 char c;
36 int idx;
37
38 cmd.state = cmd.len = 0;
39
40 /* Setup USART etc */
41 Setup_HW();
42
43 /* NVIC configuration */
44 NVIC_Configuration();
45
46 /* Setup SysTick Timer for 1 millisecond interrupts, also enables Systick and Systick-Interrupt */
47 if (SysTick_Config(SystemCoreClock / 1000)) {
48 /* Capture error */
49 comm_puts("Can't setup SysTick\r\n");
50 while (1)
51 ;
52 }
53
54 /* Say hello */
55 comm_puts("\r\nHello world\r\n");
56 idx = 0;
57
58 while (1) {
59 comm_puts("> ");
60 while (1) {
61 c = comm_get();
62
63 /* End of line? */
64 if (c == '\n' || c == '\r') {
65 cmd.buf[cmd.state] = '\0';
66 printf("\r\n");
67 cmd.len = cmd.state;
68 cmd.state = 255;
69 break;
70 }
71
72 /* Backspace/delete */
73 if (c == 0x08 || c == 0x7f) {
74 if (cmd.state > 0) {
75 cmd.state--;
76 printf("\177\040\177");
77 }
78 continue;
79 }
80
81 /* Anything unprintable just ignore it */
82 if (!isprint(c))
83 continue;
84 cmd.buf[cmd.state] = tolower(c);
85
86 /* Echo back to the user */
87 comm_put(cmd.buf[cmd.state]);
88
89 cmd.state++;
90 /* Over flow? */
91 if (cmd.state == ((sizeof(cmd.buf) / sizeof(cmd.buf[0])) - 1)) {
92 printf("\r\nLine too long");
93 cmd.state = 0;
94 continue;
95 }
96 }
97 if (cmd.len > 0)
98 printf("Got command '%s'\r\n", cmd.buf);
99 cmd.state = 0;
100 }
101 }
102
103 /* Setup hardware (USART etc) */
104 void
105 Setup_HW(void) {
106 GPIO_InitTypeDef GPIO_InitStructure;
107
108 /* Enable USART1, GPIOA, GPIOD and AFIO clocks */
109 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA |RCC_APB2Periph_GPIOD
110 | RCC_APB2Periph_AFIO, ENABLE);
111 /* Enable USART2 clock */
112 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
113
114 /* DMA1 clock enable */
115 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
116
117 /* Configure USART1 TX (PA.09) as alternate function push-pull */
118 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
119 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
120 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
121 GPIO_Init(GPIOA, &GPIO_InitStructure);
122
123 /* Configure USART1 RX (PA.10) as input floating */
124 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
125 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
126 GPIO_Init(GPIOA, &GPIO_InitStructure);
127
128 /* Init UART1 - 115200 8n1, no flow control TX & RX enabled */
129 USART_InitStructure.USART_BaudRate = 115200;
130 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
131 USART_InitStructure.USART_StopBits = USART_StopBits_1;
132 USART_InitStructure.USART_Parity = USART_Parity_No;
133 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
134 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
135
136 /* Configure USART1 */
137 USART_Init(USART1, &USART_InitStructure);
138
139 /* Enable the USART1 */
140 USART_Cmd(USART1, ENABLE);
141 }
142
143 /* Configure interrupt controller */
144 #ifdef VECT_TAB_RAM
145 /* vector-offset (TBLOFF) from bottom of SRAM. defined in linker script */
146 extern uint32_t _isr_vectorsram_offs;
147 void
148 NVIC_Configuration(void) {
149 /* Set the Vector Table base location at 0x20000000+_isr_vectorsram_offs */
150 NVIC_SetVectorTable(NVIC_VectTab_RAM, (uint32_t)&_isr_vectorsram_offs);
151 }
152 #else
153 extern uint32_t _isr_vectorsflash_offs;
154 void
155 NVIC_Configuration(void) {
156 /* Set the Vector Table base location at 0x08000000+_isr_vectorsflash_offs */
157 NVIC_SetVectorTable(NVIC_VectTab_FLASH, (uint32_t)&_isr_vectorsflash_offs);
158 }
159 #endif /* VECT_TAB_RAM */