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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Template/HiTOP/STM3210E-EVAL_XL/Settings/STM32F10x_XL.lsl @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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-1:000000000000 | 0:c59513fd84fb |
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1 //////////////////////////////////////////////////////////////////////////// | |
2 // | |
3 // File : stm32f103_cmsis.lsl | |
4 // | |
5 // Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 | |
6 // | |
7 // Description : LSL file for the STMicroelectronics STM32F103, CMSIS version | |
8 // | |
9 // Copyright 2009 Altium BV | |
10 // | |
11 // NOTE: | |
12 // This file is derived from cm3.lsl and stm32f103.lsl. | |
13 // It is assumed that the user works with the ARMv7M architecture. | |
14 // Other architectures will not work with this lsl file. | |
15 // | |
16 //////////////////////////////////////////////////////////////////////////// | |
17 | |
18 // | |
19 // We do not want the vectors as defined in arm_arch.lsl | |
20 // | |
21 #define __NO_DEFAULT_AUTO_VECTORS 1 | |
22 #define __NR_OF_VECTORS 76 | |
23 | |
24 | |
25 #ifndef __STACK | |
26 # define __STACK 8k | |
27 #endif | |
28 #ifndef __HEAP | |
29 # define __HEAP 2k | |
30 #endif | |
31 #ifndef __VECTOR_TABLE_ROM_ADDR | |
32 # define __VECTOR_TABLE_ROM_ADDR 0x08000000 | |
33 #endif | |
34 #ifndef __XVWBUF | |
35 #define __XVWBUF 256 /* buffer used by CrossView */ | |
36 #endif | |
37 | |
38 #include <arm_arch.lsl> | |
39 | |
40 //////////////////////////////////////////////////////////////////////////// | |
41 // | |
42 // In the STM32F10x, 3 different boot modes can be selected | |
43 // - User Flash memory is selected as boot space | |
44 // - SystemMemory is selected as boot space | |
45 // - Embedded SRAM is selected as boot space | |
46 // | |
47 // This aliases the physical memory associated with each boot mode to Block | |
48 // 000 (0x00000000 boot memory). Even when aliased in the boot memory space, | |
49 // the related memory (Flash memory or SRAM) is still accessible at its | |
50 // original memory space. | |
51 // | |
52 // If no memory is defined yet use the following memory settings | |
53 // | |
54 #ifndef __MEMORY | |
55 | |
56 memory stm32f103flash | |
57 { | |
58 mau = 8; | |
59 type = rom; | |
60 size = 0x100000; | |
61 map ( size = 0x100000, dest_offset=0x08000000, dest=bus:ARM:local_bus); | |
62 } | |
63 | |
64 memory stm32f103ram | |
65 { | |
66 mau = 8; | |
67 type = ram; | |
68 size = 96k; | |
69 map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); | |
70 } | |
71 | |
72 #endif /* __MEMORY */ | |
73 | |
74 | |
75 // | |
76 // Custom vector table defines interrupts according to CMSIS standard | |
77 // | |
78 # if defined(__CPU_ARMV7M__) | |
79 section_setup ::linear | |
80 { | |
81 // vector table with handler addresses | |
82 vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, | |
83 template = ".text.handler_address", | |
84 template_symbol = "_lc_vector_handler", | |
85 vector_prefix = "_vector_", | |
86 fill = loop, | |
87 no_inline | |
88 ) | |
89 { | |
90 vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work | |
91 vector ( id = 1, fill = "_START" ); | |
92 vector ( id = 2, optional, fill = "NMI_Handler" ); | |
93 vector ( id = 3, optional, fill = "HardFault_Handler" ); | |
94 vector ( id = 4, optional, fill = "MemManage_Handler" ); | |
95 vector ( id = 5, optional, fill = "BusFault_Handler" ); | |
96 vector ( id = 6, optional, fill = "UsageFault_Handler" ); | |
97 vector ( id = 11, optional, fill = "SVC_Handler" ); | |
98 vector ( id = 12, optional, fill = "DebugMon_Handler" ); | |
99 vector ( id = 14, optional, fill = "PendSV_Handler" ); | |
100 vector ( id = 15, optional, fill = "SysTick_Handler" ); | |
101 | |
102 // External Interrupts : | |
103 vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog | |
104 vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect | |
105 vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper | |
106 vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC | |
107 vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash | |
108 vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC | |
109 vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 | |
110 vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 | |
111 vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 | |
112 vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 | |
113 vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 | |
114 vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 | |
115 vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 | |
116 vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 | |
117 vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 | |
118 vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 | |
119 vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 | |
120 vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 | |
121 vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 | |
122 vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX | |
123 vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 | |
124 vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 | |
125 vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE | |
126 vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 | |
127 vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break | |
128 vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update | |
129 vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation | |
130 vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare | |
131 vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 | |
132 vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 | |
133 vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 | |
134 vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event | |
135 vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error | |
136 vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event | |
137 vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error | |
138 vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 | |
139 vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 | |
140 vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 | |
141 vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 | |
142 vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 | |
143 vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 | |
144 vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line | |
145 vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend | |
146 vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break | |
147 vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update | |
148 vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation | |
149 vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare | |
150 vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 | |
151 vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC | |
152 vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO | |
153 vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 | |
154 vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 | |
155 vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 | |
156 vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 | |
157 vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 | |
158 vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 | |
159 vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 | |
160 vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 | |
161 vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 | |
162 vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 | |
163 } | |
164 } | |
165 # endif |