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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 @page TIM_TIM1_Synchro TIM1 Synchro example
3
4 @verbatim
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
6 * @file TIM/TIM1_Synchro/readme.txt
7 * @author MCD Application Team
8 * @version V3.5.0
9 * @date 08-April-2011
10 * @brief Description of the TIM TIM1 Synchro example.
11 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 ******************************************************************************
19 @endverbatim
20
21 @par Example Description
22
23 This example shows how to synchronize TIM1 and Timers (TIM3 and TIM4) in parallel mode.
24
25 Timers synchronisation in parallel mode:
26
27 1/ TIM1 is configured as Master Timer:
28 - PWM Mode is used
29 - The TIM1 Update event is used as Trigger Output
30
31 2/ TIM3 and TIM4 are slaves for TIM1,
32 - PWM Mode is used
33 - The ITR0(TIM1) is used as input trigger for both slaves
34 - Gated mode is used, so starts and stops of slaves counters
35 are controlled by the Master trigger output signal(update event).
36
37 o For Low-density, Medium-density, High-density and Connectivity line devices:
38 The TIMxCLK is fixed to 72 MHz, Prescaler = 0 so the TIM1 counter clock is 72 MHz.
39
40 The Master Timer TIM1 is running at:
41 TIM1 frequency = TIM1 counter clock / (TIM1_Period + 1) = 281.250 KHz
42 and the duty cycle is equal to: TIM1_CCR1/(TIM1_ARR + 1) = 50%
43
44 The TIM3 is running at:
45 (TIM1 frequency)/ ((TIM3 period +1)* (Repetition_Counter+1)) = 18.750 KHz and
46 a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 33.3%
47
48 The TIM4 is running at:
49 (TIM1 frequency)/ ((TIM4 period +1)* (Repetition_Counter+1)) = 28.125 KHz and
50 a duty cycle equal to TIM4_CCR1/(TIM4_ARR + 1) = 50%
51
52 o For Value line devices:
53 The TIMxCLK is fixed to 24 MHz, Prescaler = 0 so the TIM1 counter clock is 24 MHz.
54 TIM1 frequency = 93.75 KHz
55 TIM3 frequency = 6.25 KHz
56 TIM4 frequency = 9.375 KHz
57
58 @par Directory contents
59
60 - TIM/TIM1_Synchro/stm32f10x_conf.h Library Configuration file
61 - TIM/TIM1_Synchro/stm32f10x_it.c Interrupt handlers
62 - TIM/TIM1_Synchro/stm32f10x_it.h Interrupt handlers header file
63 - TIM/TIM1_Synchro/main.c Main program
64 - TIM/TIM1_Synchro/system_stm32f10x.c STM32F10x system source file
65
66 @par Hardware and Software environment
67
68 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
69 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
70 and Low-Density Value line Devices.
71
72 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
73 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line),
74 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
75 evaluation boards and can be easily tailored to any other supported device
76 and development board.
77
78
79 - STM3210C-EVAL Set-up
80 - Connect the following pins to an oscilloscope to monitor the different waveforms:
81 - TIM1 CH1 (PE.08) Remapped pin
82 - TIM3 CH1 (PC.06) Remapped pin
83 - TIM4 CH1 (PB.06)
84
85 - STM32100B-EVAL, STM3210E-EVAL, STM32100E-EVAL and STM3210B-EVAL Set-up
86 - Connect the following pins to an oscilloscope to monitor the different waveforms:
87 - TIM1 CH1 (PA.08)
88 - TIM3 CH1 (PA.06)
89 - TIM4 CH1 (PB.06)
90
91 @par How to use it ?
92
93 In order to make the program work, you must do the following :
94 - Copy all source files from this example folder to the template folder under
95 Project\STM32F10x_StdPeriph_Template
96 - Open your preferred toolchain
97 - Rebuild all files and load your image into target memory
98 - Run the example
99
100 @note
101 - Low-density Value line devices are STM32F100xx microcontrollers where the
102 Flash memory density ranges between 16 and 32 Kbytes.
103 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
104 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
105 - Medium-density Value line devices are STM32F100xx microcontrollers where
106 the Flash memory density ranges between 64 and 128 Kbytes.
107 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
108 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
109 - High-density Value line devices are STM32F100xx microcontrollers where
110 the Flash memory density ranges between 256 and 512 Kbytes.
111 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
112 the Flash memory density ranges between 256 and 512 Kbytes.
113 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
114 the Flash memory density ranges between 512 and 1024 Kbytes.
115 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
116
117 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
118 */