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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 ******************************************************************************
3 * @file TIM/TIM1_Synchro/main.c
4 * @author MCD Application Team
5 * @version V3.5.0
6 * @date 08-April-2011
7 * @brief Main program body
8 ******************************************************************************
9 * @attention
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
20 */
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Examples
26 * @{
27 */
28
29 /** @addtogroup TIM_TIM1_Synchro
30 * @{
31 */
32
33 /* Private typedef -----------------------------------------------------------*/
34 /* Private define ------------------------------------------------------------*/
35 /* Private macro -------------------------------------------------------------*/
36 /* Private variables ---------------------------------------------------------*/
37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
38 TIM_OCInitTypeDef TIM_OCInitStructure;
39 TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
40
41 /* Private function prototypes -----------------------------------------------*/
42 void RCC_Configuration(void);
43 void GPIO_Configuration(void);
44
45 /* Private functions ---------------------------------------------------------*/
46
47 /**
48 * @brief Main program
49 * @param None
50 * @retval None
51 */
52 int main(void)
53 {
54 /*!< At this stage the microcontroller clock setting is already configured,
55 this is done through SystemInit() function which is called from startup
56 file (startup_stm32f10x_xx.s) before to branch to application main.
57 To reconfigure the default setting of SystemInit() function, refer to
58 system_stm32f10x.c file
59 */
60
61 /* System Clocks Configuration */
62 RCC_Configuration();
63
64 /* GPIO Configuration */
65 GPIO_Configuration();
66
67 /* TIM1 and Timers(TIM3 and TIM4) synchronisation in parallel mode -----------
68 1/TIM1 is configured as Master Timer:
69 - PWM Mode is used
70 - The TIM1 Update event is used as Trigger Output
71
72 2/TIM3 and TIM4 are slaves for TIM1,
73 - PWM Mode is used
74 - The ITR0(TIM1) is used as input trigger for both slaves
75 - Gated mode is used, so starts and stops of slaves counters
76 are controlled by the Master trigger output signal(update event).
77
78 o For Low-density, Medium-density, High-density and Connectivity line devices:
79 The TIMxCLK is fixed to 72 MHz, Prescaler = 0 so the TIM1 counter clock is 72 MHz.
80
81 The Master Timer TIM1 is running at:
82 TIM1 frequency = TIM1 counter clock / (TIM1_Period + 1) = 281.250 KHz
83 and the duty cycle is equal to: TIM1_CCR1/(TIM1_ARR + 1) = 50%
84
85 The TIM3 is running at:
86 (TIM1 frequency)/ ((TIM3 period +1)* (Repetition_Counter+1)) = 18.750 KHz and
87 a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 33.3%
88
89 The TIM4 is running at:
90 (TIM1 frequency)/ ((TIM4 period +1)* (Repetition_Counter+1)) = 28.125 KHz and
91 a duty cycle equal to TIM4_CCR1/(TIM4_ARR + 1) = 50%
92
93 o For Low-Density Value line and Medium-Density Value line devices:
94 The TIMxCLK is fixed to 24 MHz, Prescaler = 0 so the TIM1 counter clock is 24 MHz.
95 TIM1 frequency = 93.75 KHz
96 TIM3 frequency = 6.25 KHz
97 TIM4 frequency = 9.375 KHz
98 --------------------------------------------------------------------------- */
99
100 /* TIM3 Peripheral Configuration ----------------------------------------*/
101 /* TIM3 Slave Configuration: PWM1 Mode */
102 TIM_TimeBaseStructure.TIM_Period = 2;
103 TIM_TimeBaseStructure.TIM_Prescaler = 0;
104 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
105 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
106
107 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
108
109 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
110 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
111 TIM_OCInitStructure.TIM_Pulse = 1;
112
113 TIM_OC1Init(TIM3, &TIM_OCInitStructure);
114
115 /* Slave Mode selection: TIM3 */
116 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);
117 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR0);
118
119 /* TIM4 Peripheral Configuration ----------------------------------------*/
120 /* TIM4 Slave Configuration: PWM1 Mode */
121 TIM_TimeBaseStructure.TIM_Period = 1;
122 TIM_TimeBaseStructure.TIM_Prescaler = 0;
123 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
124 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
125
126 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
127
128 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
129 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
130 TIM_OCInitStructure.TIM_Pulse = 1;
131
132 TIM_OC1Init(TIM4, &TIM_OCInitStructure);
133
134 /* Slave Mode selection: TIM4 */
135 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
136 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0);
137
138 /* TIM1 Peripheral Configuration ----------------------------------------*/
139 /* Time Base configuration */
140 TIM_TimeBaseStructure.TIM_Prescaler = 0;
141 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
142 TIM_TimeBaseStructure.TIM_Period = 255;
143 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
144 TIM_TimeBaseStructure.TIM_RepetitionCounter = 4;
145
146 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
147
148 /* Channel 1 Configuration in PWM mode */
149 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
151 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
152 TIM_OCInitStructure.TIM_Pulse = 127;
153 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
154 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
155 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
156 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
157
158 TIM_OC1Init(TIM1, &TIM_OCInitStructure);
159
160 /* Automatic Output enable, Break, dead time and lock configuration*/
161 TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
162 TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
163 TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
164 TIM_BDTRInitStructure.TIM_DeadTime = 5;
165 TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
166 TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
167 TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
168
169 TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
170
171 /* Master Mode selection */
172 TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
173
174 /* Select the Master Slave Mode */
175 TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
176
177 /* TIM1 counter enable */
178 TIM_Cmd(TIM1, ENABLE);
179
180 /* TIM enable counter */
181 TIM_Cmd(TIM3, ENABLE);
182 TIM_Cmd(TIM4, ENABLE);
183
184 /* Main Output Enable */
185 TIM_CtrlPWMOutputs(TIM1, ENABLE);
186
187 while (1)
188 {}
189 }
190
191 /**
192 * @brief Configures the different system clocks.
193 * @param None
194 * @retval None
195 */
196 void RCC_Configuration(void)
197 {
198 /* TIM1, GPIOA and GPIOB clock enable */
199 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOE |
200 RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
201
202 /* TIM3 and TIM4 clock enable */
203 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4, ENABLE);
204 }
205
206 /**
207 * @brief Configures TIM1, TIM3 and TIM4 Pins.
208 * @param None
209 * @retval None
210 */
211 void GPIO_Configuration(void)
212 {
213 GPIO_InitTypeDef GPIO_InitStructure;
214
215 #ifdef STM32F10X_CL
216 /* GPIOC Configuration: TIM3 channel1 as alternate function push-pull */
217 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
218 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
219 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
220
221 GPIO_Init(GPIOC, &GPIO_InitStructure);
222
223 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE);
224
225 /* GPIOE Configuration: TIM1 channel1 as alternate function push-pull */
226 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
227
228 GPIO_Init(GPIOE, &GPIO_InitStructure);
229
230 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE);
231
232 #else
233
234 /* GPIOA Configuration: TIM1 Channel1 and TIM3 Channel1 as alternate function push-pull */
235 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_8;
236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
237 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
238 GPIO_Init(GPIOA, &GPIO_InitStructure);
239 #endif
240
241 /* GPIOB Configuration: TIM4 Channel1 as alternate function push-pull */
242 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
243 GPIO_Init(GPIOB, &GPIO_InitStructure);
244 }
245
246 #ifdef USE_FULL_ASSERT
247
248 /**
249 * @brief Reports the name of the source file and the source line number
250 * where the assert_param error has occurred.
251 * @param file: pointer to the source file name
252 * @param line: assert_param error line source number
253 * @retval None
254 */
255 void assert_failed(uint8_t* file, uint32_t line)
256 {
257 /* User can add his own implementation to report the file name and line number,
258 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
259
260 while (1)
261 {}
262 }
263
264 #endif
265
266 /**
267 * @}
268 */
269
270 /**
271 * @}
272 */
273
274 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/