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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/Parallel_Synchro/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file TIM/Parallel_Synchro/main.c | |
4 * @author MCD Application Team | |
5 * @version V3.5.0 | |
6 * @date 08-April-2011 | |
7 * @brief Main program body | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
17 * | |
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> | |
19 ****************************************************************************** | |
20 */ | |
21 | |
22 /* Includes ------------------------------------------------------------------*/ | |
23 #include "stm32f10x.h" | |
24 | |
25 /** @addtogroup STM32F10x_StdPeriph_Examples | |
26 * @{ | |
27 */ | |
28 | |
29 /** @addtogroup TIM_Parallel_Synchro | |
30 * @{ | |
31 */ | |
32 | |
33 /* Private typedef -----------------------------------------------------------*/ | |
34 /* Private define ------------------------------------------------------------*/ | |
35 /* Private macro -------------------------------------------------------------*/ | |
36 /* Private variables ---------------------------------------------------------*/ | |
37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; | |
38 TIM_OCInitTypeDef TIM_OCInitStructure; | |
39 | |
40 /* Private function prototypes -----------------------------------------------*/ | |
41 void RCC_Configuration(void); | |
42 void GPIO_Configuration(void); | |
43 | |
44 /* Private functions ---------------------------------------------------------*/ | |
45 | |
46 /** | |
47 * @brief Main program | |
48 * @param None | |
49 * @retval None | |
50 */ | |
51 int main(void) | |
52 { | |
53 /*!< At this stage the microcontroller clock setting is already configured, | |
54 this is done through SystemInit() function which is called from startup | |
55 file (startup_stm32f10x_xx.s) before to branch to application main. | |
56 To reconfigure the default setting of SystemInit() function, refer to | |
57 system_stm32f10x.c file | |
58 */ | |
59 | |
60 /* System Clocks Configuration */ | |
61 RCC_Configuration(); | |
62 | |
63 /* GPIO Configuration */ | |
64 GPIO_Configuration(); | |
65 | |
66 /* Timers synchronisation in parallel mode ---------------------------- | |
67 1/TIM2 is configured as Master Timer: | |
68 - PWM Mode is used | |
69 - The TIM2 Update event is used as Trigger Output | |
70 2/TIM3 and TIM4 are slaves for TIM2, | |
71 - PWM Mode is used | |
72 - The ITR1(TIM2) is used as input trigger for both slaves | |
73 - Gated mode is used, so starts and stops of slaves counters | |
74 are controlled by the Master trigger output signal(update event). | |
75 | |
76 * For Low-density, Medium-density, High-density and Connectivity line devices: | |
77 The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz. | |
78 The Master Timer TIM2 is running at 281.250 KHz and the duty cycle | |
79 is equal to 25% | |
80 The TIM3 is running: | |
81 - At (TIM2 frequency)/ (TIM3 period + 1) = 28.125 KHz and a duty cycle | |
82 equal to TIM3_CCR1/(TIM3_ARR + 1) = 30% | |
83 The TIM4 is running: | |
84 - At (TIM2 frequency)/ (TIM4 period + 1) = 56.250 KHz and a duty cycle | |
85 equal to TIM4_CCR1/(TIM4_ARR + 1) = 60% | |
86 | |
87 * For Value line devices: | |
88 The TIMxCLK is fixed to 24 MHz, the TIM2 counter clock is 24 MHz. | |
89 TIM2 frequency = 93.750 KHz, | |
90 TIM3 frequency = 23.437 KHz, | |
91 TIM4 frequency = 18.75 KHz | |
92 -------------------------------------------------------------------- */ | |
93 | |
94 /* Time base configuration */ | |
95 TIM_TimeBaseStructure.TIM_Period = 255; | |
96 TIM_TimeBaseStructure.TIM_Prescaler = 0; | |
97 TIM_TimeBaseStructure.TIM_ClockDivision = 0; | |
98 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; | |
99 | |
100 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); | |
101 | |
102 TIM_TimeBaseStructure.TIM_Period = 9; | |
103 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); | |
104 | |
105 TIM_TimeBaseStructure.TIM_Period = 4; | |
106 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); | |
107 | |
108 /* Master Configuration in PWM1 Mode */ | |
109 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; | |
110 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
111 TIM_OCInitStructure.TIM_Pulse = 64; | |
112 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; | |
113 | |
114 TIM_OC1Init(TIM2, &TIM_OCInitStructure); | |
115 | |
116 /* Select the Master Slave Mode */ | |
117 TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); | |
118 | |
119 /* Master Mode selection */ | |
120 TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); | |
121 | |
122 /* Slaves Configuration: PWM1 Mode */ | |
123 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; | |
124 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
125 TIM_OCInitStructure.TIM_Pulse = 3; | |
126 | |
127 TIM_OC1Init(TIM3, &TIM_OCInitStructure); | |
128 | |
129 TIM_OC1Init(TIM4, &TIM_OCInitStructure); | |
130 | |
131 /* Slave Mode selection: TIM3 */ | |
132 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); | |
133 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1); | |
134 | |
135 /* Slave Mode selection: TIM4 */ | |
136 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated); | |
137 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR1); | |
138 | |
139 /* TIM enable counter */ | |
140 TIM_Cmd(TIM3, ENABLE); | |
141 TIM_Cmd(TIM2, ENABLE); | |
142 TIM_Cmd(TIM4, ENABLE); | |
143 | |
144 while (1) | |
145 {} | |
146 } | |
147 | |
148 /** | |
149 * @brief Configures the different system clocks. | |
150 * @param None | |
151 * @retval None | |
152 */ | |
153 void RCC_Configuration(void) | |
154 { | |
155 /* TIM2, TIM3 and TIM4 clock enable */ | |
156 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | | |
157 RCC_APB1Periph_TIM4, ENABLE); | |
158 | |
159 /* GPIOA, GPIOB, GPIOC and AFIO clocks enable */ | |
160 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | | |
161 RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); | |
162 } | |
163 | |
164 /** | |
165 * @brief Configure the GPIO Pins. | |
166 * @param None | |
167 * @retval None | |
168 */ | |
169 void GPIO_Configuration(void) | |
170 { | |
171 GPIO_InitTypeDef GPIO_InitStructure; | |
172 | |
173 #ifdef STM32F10X_CL | |
174 /*GPIOB Configuration: PC6(TIM3 CH1) as alternate function push-pull */ | |
175 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 ; | |
176 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
177 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
178 | |
179 GPIO_Init(GPIOC, &GPIO_InitStructure); | |
180 | |
181 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE); | |
182 | |
183 #else | |
184 /* GPIOA Configuration: PA6(TIM3 CH1) as alternate function push-pull */ | |
185 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; | |
186 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
187 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
188 | |
189 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
190 #endif | |
191 /* GPIOA Configuration: PA0(TIM2 CH1) as alternate function push-pull */ | |
192 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; | |
193 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
194 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
195 | |
196 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
197 | |
198 /* GPIOB Configuration: PB6(TIM4 CH1) as alternate function push-pull */ | |
199 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; | |
200 | |
201 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
202 } | |
203 | |
204 #ifdef USE_FULL_ASSERT | |
205 | |
206 /** | |
207 * @brief Reports the name of the source file and the source line number | |
208 * where the assert_param error has occurred. | |
209 * @param file: pointer to the source file name | |
210 * @param line: assert_param error line source number | |
211 * @retval None | |
212 */ | |
213 void assert_failed(uint8_t* file, uint32_t line) | |
214 { | |
215 /* User can add his own implementation to report the file name and line number, | |
216 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
217 | |
218 while (1) | |
219 {} | |
220 } | |
221 | |
222 #endif | |
223 | |
224 /** | |
225 * @} | |
226 */ | |
227 | |
228 /** | |
229 * @} | |
230 */ | |
231 | |
232 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |