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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/ExtTrigger_Synchro/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file TIM/ExtTrigger_Synchro/main.c | |
4 * @author MCD Application Team | |
5 * @version V3.5.0 | |
6 * @date 08-April-2011 | |
7 * @brief Main program body | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
17 * | |
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> | |
19 ****************************************************************************** | |
20 */ | |
21 | |
22 /* Includes ------------------------------------------------------------------*/ | |
23 #include "stm32f10x.h" | |
24 | |
25 /** @addtogroup STM32F10x_StdPeriph_Examples | |
26 * @{ | |
27 */ | |
28 | |
29 /** @addtogroup TIM_ExtTrigger_Synchro | |
30 * @{ | |
31 */ | |
32 | |
33 /* Private typedef -----------------------------------------------------------*/ | |
34 /* Private define ------------------------------------------------------------*/ | |
35 /* Private macro -------------------------------------------------------------*/ | |
36 /* Private variables ---------------------------------------------------------*/ | |
37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; | |
38 TIM_ICInitTypeDef TIM_ICInitStructure; | |
39 TIM_OCInitTypeDef TIM_OCInitStructure; | |
40 | |
41 /* Private function prototypes -----------------------------------------------*/ | |
42 void RCC_Configuration(void); | |
43 void GPIO_Configuration(void); | |
44 | |
45 /* Private functions ---------------------------------------------------------*/ | |
46 | |
47 /** | |
48 * @brief Main program | |
49 * @param None | |
50 * @retval None | |
51 */ | |
52 int main(void) | |
53 { | |
54 /*!< At this stage the microcontroller clock setting is already configured, | |
55 this is done through SystemInit() function which is called from startup | |
56 file (startup_stm32f10x_xx.s) before to branch to application main. | |
57 To reconfigure the default setting of SystemInit() function, refer to | |
58 system_stm32f10x.c file | |
59 */ | |
60 | |
61 /* System Clocks Configuration */ | |
62 RCC_Configuration(); | |
63 | |
64 /* Configure the GPIO ports */ | |
65 GPIO_Configuration(); | |
66 | |
67 /* Timers synchronisation in cascade mode with an external trigger ----- | |
68 1/TIM1 is configured as Master Timer: | |
69 - Toggle Mode is used | |
70 - The TIM1 Enable event is used as Trigger Output | |
71 | |
72 2/TIM1 is configured as Slave Timer for an external Trigger connected | |
73 to TIM1 TI2 pin (TIM1 CH2 configured as input pin): | |
74 - The TIM1 TI2FP2 is used as Trigger Input | |
75 - Rising edge is used to start and stop the TIM1: Gated Mode. | |
76 | |
77 3/TIM3 is slave for TIM1 and Master for TIM4, | |
78 - Toggle Mode is used | |
79 - The ITR1(TIM1) is used as input trigger | |
80 - Gated mode is used, so start and stop of slave counter | |
81 are controlled by the Master trigger output signal(TIM1 enable event). | |
82 - The TIM3 enable event is used as Trigger Output. | |
83 | |
84 4/TIM4 is slave for TIM3, | |
85 - Toggle Mode is used | |
86 - The ITR2(TIM3) is used as input trigger | |
87 - Gated mode is used, so start and stop of slave counter | |
88 are controlled by the Master trigger output signal(TIM3 enable event). | |
89 | |
90 * For Low-density, Medium-density, High-density and Connectivity line devices: | |
91 The TIMxCLK is fixed to 72 MHZ, the Prescaler is equal to 2 so the TIMx clock | |
92 counter is equal to 24 MHz. | |
93 The Three Timers are running at: | |
94 TIMx frequency = TIMx clock counter/ 2*(TIMx_Period + 1) = 162.1 KHz. | |
95 | |
96 * For Low-Density Value line and Medium-Density Value line devices: | |
97 The TIMxCLK is fixed to 24 MHz, the Prescaler is equal to 2 so the TIMx clock | |
98 counter is equal to 8 MHz. | |
99 TIMx frequency = TIMx clock counter/ 2*(TIMx_Period + 1) = 54 KHz. | |
100 | |
101 The starts and stops of the TIM1 counters are controlled by the | |
102 external trigger. | |
103 The TIM3 starts and stops are controlled by the TIM1, and the TIM4 | |
104 starts and stops are controlled by the TIM3. | |
105 -------------------------------------------------------------------- */ | |
106 | |
107 /* Time base configuration */ | |
108 TIM_TimeBaseStructure.TIM_Period = 73; | |
109 TIM_TimeBaseStructure.TIM_Prescaler = 2; | |
110 TIM_TimeBaseStructure.TIM_ClockDivision = 0; | |
111 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; | |
112 | |
113 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); | |
114 | |
115 TIM_TimeBaseStructure.TIM_Period = 73; | |
116 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); | |
117 | |
118 TIM_TimeBaseStructure.TIM_Period = 73; | |
119 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); | |
120 | |
121 /* Master Configuration in Toggle Mode */ | |
122 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; | |
123 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
124 TIM_OCInitStructure.TIM_Pulse = 64; | |
125 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; | |
126 | |
127 TIM_OC1Init(TIM1, &TIM_OCInitStructure); | |
128 | |
129 /* TIM1 Input Capture Configuration */ | |
130 TIM_ICInitStructure.TIM_Channel = TIM_Channel_2; | |
131 TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising; | |
132 TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI; | |
133 TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1; | |
134 TIM_ICInitStructure.TIM_ICFilter = 0; | |
135 | |
136 TIM_ICInit(TIM1, &TIM_ICInitStructure); | |
137 | |
138 /* TIM1 Input trigger configuration: External Trigger connected to TI2 */ | |
139 TIM_SelectInputTrigger(TIM1, TIM_TS_TI2FP2); | |
140 TIM_SelectSlaveMode(TIM1, TIM_SlaveMode_Gated); | |
141 | |
142 /* Select the Master Slave Mode */ | |
143 TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable); | |
144 | |
145 /* Master Mode selection: TIM1 */ | |
146 TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Enable); | |
147 | |
148 /* Slaves Configuration: Toggle Mode */ | |
149 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; | |
150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
151 | |
152 TIM_OC1Init(TIM3, &TIM_OCInitStructure); | |
153 | |
154 TIM_OC1Init(TIM4, &TIM_OCInitStructure); | |
155 | |
156 /* Slave Mode selection: TIM3 */ | |
157 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR0); | |
158 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); | |
159 | |
160 /* Select the Master Slave Mode */ | |
161 TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable); | |
162 | |
163 /* Master Mode selection: TIM3 */ | |
164 TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Enable); | |
165 | |
166 /* Slave Mode selection: TIM4 */ | |
167 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR2); | |
168 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated); | |
169 | |
170 /* TIM1 Main Output Enable */ | |
171 TIM_CtrlPWMOutputs(TIM1, ENABLE); | |
172 | |
173 /* TIM enable counter */ | |
174 TIM_Cmd(TIM1, ENABLE); | |
175 TIM_Cmd(TIM3, ENABLE); | |
176 TIM_Cmd(TIM4, ENABLE); | |
177 | |
178 while (1) | |
179 {} | |
180 } | |
181 | |
182 /** | |
183 * @brief Configures the different system clocks. | |
184 * @param None | |
185 * @retval None | |
186 */ | |
187 void RCC_Configuration(void) | |
188 { | |
189 /* TIM1, TIM3 and TIM4 clock enable */ | |
190 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | | |
191 RCC_APB1Periph_TIM4, ENABLE); | |
192 | |
193 /* TIM1, GPIOA, GPIOE, GPIOC and GPIOB clocks enable */ | |
194 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | | |
195 RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); | |
196 } | |
197 | |
198 /** | |
199 * @brief Configure the GPIO Pins. | |
200 * @param None | |
201 * @retval None | |
202 */ | |
203 void GPIO_Configuration(void) | |
204 { | |
205 GPIO_InitTypeDef GPIO_InitStructure; | |
206 #ifdef STM32F10X_CL | |
207 /* GPIOE Configuration: Channel 1 as alternate function push-pull */ | |
208 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; | |
209 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
210 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
211 | |
212 GPIO_Init(GPIOE, &GPIO_InitStructure); | |
213 | |
214 /* GPIOE Configuration: Channel 2 as Input floating */ | |
215 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; | |
216 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; | |
217 | |
218 GPIO_Init(GPIOE, &GPIO_InitStructure); | |
219 | |
220 /* TIM1 Full remapping pins */ | |
221 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE); | |
222 | |
223 /*GPIOB Configuration: TIM3 channel1, 2, 3 and 4 */ | |
224 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; | |
225 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
226 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
227 | |
228 GPIO_Init(GPIOC, &GPIO_InitStructure); | |
229 | |
230 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE); | |
231 | |
232 /* GPIOB Configuration: PB.06(TIM4 CH1) as alternate function push-pull */ | |
233 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; | |
234 | |
235 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
236 | |
237 #else | |
238 /* GPIOA Configuration: PA.08(TIM1 CH1) and PA.06(TIM3 CH1) as alternate function push-pull */ | |
239 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_6; | |
240 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
242 | |
243 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
244 | |
245 /* GPIOB Configuration: PB.06(TIM4 CH1) as alternate function push-pull */ | |
246 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; | |
247 | |
248 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
249 | |
250 /* GPIOA Configuration: PA.09(TIM1 CH2) */ | |
251 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; | |
252 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; | |
253 | |
254 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
255 | |
256 #endif | |
257 | |
258 } | |
259 | |
260 #ifdef USE_FULL_ASSERT | |
261 | |
262 /** | |
263 * @brief Reports the name of the source file and the source line number | |
264 * where the assert_param error has occurred. | |
265 * @param file: pointer to the source file name | |
266 * @param line: assert_param error line source number | |
267 * @retval None | |
268 */ | |
269 void assert_failed(uint8_t* file, uint32_t line) | |
270 { | |
271 /* User can add his own implementation to report the file name and line number, | |
272 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
273 | |
274 while (1) | |
275 {} | |
276 } | |
277 | |
278 #endif | |
279 | |
280 /** | |
281 * @} | |
282 */ | |
283 | |
284 /** | |
285 * @} | |
286 */ | |
287 | |
288 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |