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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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-1:000000000000 | 0:c59513fd84fb |
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1 /** | |
2 ****************************************************************************** | |
3 * @file TIM/DMABurst/main.c | |
4 * @author MCD Application Team | |
5 * @version V3.5.0 | |
6 * @date 08-April-2011 | |
7 * @brief Main program body | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
17 * | |
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> | |
19 ****************************************************************************** | |
20 */ | |
21 | |
22 /* Includes ------------------------------------------------------------------*/ | |
23 #include "stm32f10x.h" | |
24 | |
25 /** @addtogroup STM32F10x_StdPeriph_Examples | |
26 * @{ | |
27 */ | |
28 | |
29 /** @addtogroup TIM_DMABurst | |
30 * @{ | |
31 */ | |
32 | |
33 /* Private typedef -----------------------------------------------------------*/ | |
34 /* Private define ------------------------------------------------------------*/ | |
35 #define TIM1_DMAR_ADDRESS ((uint32_t)0x40012C4C) /* TIM ARR (Auto Reload Register) address */ | |
36 | |
37 /* Private macro -------------------------------------------------------------*/ | |
38 /* Private variables ---------------------------------------------------------*/ | |
39 GPIO_InitTypeDef GPIO_InitStructure; | |
40 DMA_InitTypeDef DMA_InitStructure; | |
41 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; | |
42 TIM_OCInitTypeDef TIM_OCInitStructure; | |
43 uint16_t SRC_Buffer[6] = {0x0FFF, 0x0000, 0x0555}; | |
44 | |
45 /* Private function prototypes -----------------------------------------------*/ | |
46 /* Private functions ---------------------------------------------------------*/ | |
47 | |
48 /** | |
49 * @brief Main program | |
50 * @param None | |
51 * @retval None | |
52 */ | |
53 int main(void) | |
54 { | |
55 /*!< At this stage the microcontroller clock setting is already configured, | |
56 this is done through SystemInit() function which is called from startup | |
57 file (startup_stm32f10x_xx.s) before to branch to application main. | |
58 To reconfigure the default setting of SystemInit() function, refer to | |
59 system_stm32f10x.c file | |
60 */ | |
61 | |
62 /* TIM1 and GPIOA clock enable */ | |
63 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA, ENABLE); | |
64 | |
65 /* DMA clock enable */ | |
66 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); | |
67 | |
68 /* GPIOA Configuration: Channel 1 as alternate function push-pull */ | |
69 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; | |
70 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
71 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
72 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
73 | |
74 /* TIM1 DeInit */ | |
75 TIM_DeInit(TIM1); | |
76 | |
77 /* DMA1 Channel5 Config */ | |
78 DMA_DeInit(DMA1_Channel5); | |
79 | |
80 DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)TIM1_DMAR_ADDRESS; | |
81 DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SRC_Buffer; | |
82 DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; | |
83 DMA_InitStructure.DMA_BufferSize = 3; | |
84 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; | |
85 DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; | |
86 DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; | |
87 DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; | |
88 DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; | |
89 DMA_InitStructure.DMA_Priority = DMA_Priority_High; | |
90 DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; | |
91 DMA_Init(DMA1_Channel5, &DMA_InitStructure); | |
92 | |
93 /* Time base configuration */ | |
94 /* ----------------------------------------------------------------------- | |
95 TIM1 Configuration: generate 1 PWM signal using the DMA burst mode: | |
96 The TIM1CLK frequency is set to SystemCoreClock (Hz), to get TIM1 counter | |
97 clock at 24 MHz the Prescaler is computed as following: | |
98 - Prescaler = (TIM1CLK / TIM1 counter clock) - 1 | |
99 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density | |
100 and Connectivity line devices and to 24 MHz for Low-Density Value line and | |
101 Medium-Density Value line devices | |
102 | |
103 The TIM1 period is 5.8 KHz: TIM1 Frequency = TIM1 counter clock/(ARR + 1) | |
104 = 24 MHz / 4096 = 5.8KHz KHz | |
105 TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR)* 100 = 33.33% | |
106 ----------------------------------------------------------------------- */ | |
107 TIM_TimeBaseStructure.TIM_Period = 0xFFFF; | |
108 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t) (SystemCoreClock / 24000000) - 1; | |
109 TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; | |
110 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; | |
111 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); | |
112 | |
113 /* TIM Configuration in PWM Mode */ | |
114 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; | |
115 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; | |
116 TIM_OCInitStructure.TIM_Pulse = 0xFFF; | |
117 TIM_OC1Init(TIM1, &TIM_OCInitStructure); | |
118 | |
119 /* TIM1 DMAR Base register and DMA Burst Length Config */ | |
120 TIM_DMAConfig(TIM1, TIM_DMABase_ARR, TIM_DMABurstLength_3Transfers); | |
121 | |
122 /* TIM1 DMA Update enable */ | |
123 TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE); | |
124 | |
125 /* TIM1 enable */ | |
126 TIM_Cmd(TIM1, ENABLE); | |
127 | |
128 /* TIM1 PWM Outputs Enable */ | |
129 TIM_CtrlPWMOutputs(TIM1, ENABLE); | |
130 | |
131 /* DMA1 Channel5 enable */ | |
132 DMA_Cmd(DMA1_Channel5, ENABLE); | |
133 | |
134 /* Wait until DMA1 Channel5 end of Transfer */ | |
135 while (!DMA_GetFlagStatus(DMA1_FLAG_TC5)) | |
136 { | |
137 } | |
138 | |
139 /* Infinite loop */ | |
140 while(1) | |
141 { | |
142 } | |
143 } | |
144 | |
145 | |
146 #ifdef USE_FULL_ASSERT | |
147 | |
148 /** | |
149 * @brief Reports the name of the source file and the source line number | |
150 * where the assert_param error has occurred. | |
151 * @param file: pointer to the source file name | |
152 * @param line: assert_param error line source number | |
153 * @retval None | |
154 */ | |
155 void assert_failed(uint8_t* file, uint32_t line) | |
156 { | |
157 /* User can add his own implementation to report the file name and line number, | |
158 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
159 | |
160 while (1) | |
161 {} | |
162 } | |
163 #endif | |
164 | |
165 /** | |
166 * @} | |
167 */ | |
168 | |
169 /** | |
170 * @} | |
171 */ | |
172 | |
173 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |