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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 @page TIM_ComplementarySignals TIM Complementary Signals example
3
4 @verbatim
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
6 * @file TIM/ComplementarySignals/readme.txt
7 * @author MCD Application Team
8 * @version V3.5.0
9 * @date 08-April-2011
10 * @brief Description of the TIM Complementary Signals example.
11 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 ******************************************************************************
19 @endverbatim
20
21 @par Example Description
22
23 This example shows how to configure the TIM1 peripheral to generate three
24 complementary TIM1 signals, to insert a defined dead time value, to use the break
25 feature and to lock the desired parameters.
26
27 TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is equal to 0 so the
28 TIM1 counter clock used is SystemCoreClock.
29 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density
30 and Connectivity line devices. For Low-Density Value line, Medium-Density and
31 High-Density Value line devices, SystemCoreClock is set to 24 MHz.
32
33 The objective is to generate PWM signal at 17.57 KHz:
34 - TIM1_Period = (SystemCoreClock / 17570) - 1
35
36 The Three Duty cycles are computed as the following description:
37 The channel 1 duty cycle is set to 50% so channel 1N is set to 50%.
38 The channel 2 duty cycle is set to 25% so channel 2N is set to 75%.
39 The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%.
40 The Timer pulse is calculated as follows:
41 - ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100
42
43 A dead time equal to 11/SystemCoreClock is inserted between the different
44 complementary signals, and the Lock level 1 is selected.
45 The break Polarity is used at High level.
46
47 The TIM1 waveform can be displayed using an oscilloscope.
48
49 @par Directory contents
50
51 - TIM/ComplementarySignals/stm32f10x_conf.h Library Configuration file
52 - TIM/ComplementarySignals/stm32f10x_it.c Interrupt handlers
53 - TIM/ComplementarySignals/stm32f10x_it.h Interrupt handlers header file
54 - TIM/ComplementarySignals/main.c Main program
55 - TIM/ComplementarySignals/system_stm32f10x.c STM32F10x system source file
56
57 @par Hardware and Software environment
58
59 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
60 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
61 and Low-Density Value line Devices.
62
63 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
64 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line),
65 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
66 evaluation boards and can be easily tailored to any other supported device
67 and development board.
68
69
70 - STM3210C-EVAL Set-up
71 - Connect the TIM1 pins(TIM1 full remapped pins) to an oscilloscope to monitor the different waveforms:
72 - TIM1_CH1 pin (PE.09)
73 - TIM1_CH1N pin (PE.08)
74 - TIM1_CH2 pin (PE.11)
75 - TIM1_CH1N pin (PE.10)
76 - TIM1_CH3 pin (PE.13)
77 - TIM1_CH3N pin (PE.12)
78 - Connect the TIM1 break pin TIM1_BKIN pin (PE.15) to the GND. To generate a
79 break event, switch this pin level from 0V to 3.3V.
80
81 - STM3210E-EVAL, STM3210B-EVAL, STM32100B-EVAL and STM32100E-EVAL Set-up
82 - Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
83 - TIM1_CH1 pin (PA.08)
84 - TIM1_CH1N pin (PB.13)
85 - TIM1_CH2 pin (PA.09)
86 - TIM1_CH2N pin (PB.14)
87 - TIM1_CH3 pin (PA.10)
88 - TIM1_CH3N pin (PB.15)
89
90 - Connect the TIM1 break pin TIM1_BKIN pin (PB.12) to the GND. To generate a
91 break event, switch this pin level from 0V to 3.3V.
92
93 @par How to use it ?
94
95 In order to make the program work, you must do the following :
96 - Copy all source files from this example folder to the template folder under
97 Project\STM32F10x_StdPeriph_Template
98 - Open your preferred toolchain
99 - Rebuild all files and load your image into target memory
100 - Run the example
101
102 @note
103 - Low-density Value line devices are STM32F100xx microcontrollers where the
104 Flash memory density ranges between 16 and 32 Kbytes.
105 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
106 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
107 - Medium-density Value line devices are STM32F100xx microcontrollers where
108 the Flash memory density ranges between 64 and 128 Kbytes.
109 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
110 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
111 - High-density Value line devices are STM32F100xx microcontrollers where
112 the Flash memory density ranges between 256 and 512 Kbytes.
113 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
114 the Flash memory density ranges between 256 and 512 Kbytes.
115 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
116 the Flash memory density ranges between 512 and 1024 Kbytes.
117 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
118
119 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
120 */